Configuration Guide for Cisco NCS 1014, IOS XR Releases 26.x.x

View channel APC information

Updated: September 23, 2026

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Use this procedure to configure and use the show command to view channel Automatic Power Control (APC) status and parameters.

This task describes how to view channel APC information.

These tables describe the different parameters and status values in the output of the show command.

Table 1. Channel APC parameter definitions
Parameter	Description
Controller	Identifier of the optical controller managing the channel, formatted as Ots0/slot/interface/port.
Internal Status	Current state of the Channel APC control loop, e.g., IDLE means regulation is complete and stable.
Input Gain	Gain value (in dB) applied by the first stage amplifier (BST1) to the input signal.
Input Gain Range	Gain range mode of the BST1 amplifier, e.g., Normal or Extended, indicating the amplifier’s operating range.
Input Gain Range Min - Max	Minimum and maximum gain values (in dB) for the BST1 amplifier in the current gain range.
Last Correction	Timestamp of the last adjustment made by the Channel APC control loop to equalize channel power.
Output PSD Target	Target Power Spectral Density (PSD) value (in dBm/12.5 GHz) that the Channel APC aims to maintain for all channels.
PSD Correction Tolerance	Allowed deviation margin (in dB) from the target PSD before the Channel APC initiates a correction.

Table 2. Channel APC status definitions
Status	Description
BLOCKED	Triggered by amplifier safety events (APR, OSRI), RX-LOS alarms, or OTS controller shutdown. The following reasons can cause this status: INPUT-EDFA-OSRI-ENABLED OUTPUT-EDFA-OSRI-ENABLED INPUT-EDFA-RX-LOS OUTPUT-OTS-SHUTDOWN INPUT-OTS-SHUTDOWN
PAUSED	Regulation paused via channel-apc-pause command; no adjustments occur.
IDLE	Regulation complete; all channels meet target PSD within tolerance.
REGULATING	Active regulation in progress to correct PSD discrepancies.

Table 3. Channel APC table parameters
Parameter	Description
Controller	Ots-Och r/s/i/p/<channel-id> Channel in input to the COM-RX
Center Frequency	Central frequency of the channel
Width	Width of the channel
Status	Status of the Channel, see the Channel APC per-channel status definitions table.
Spectrum	Set of spectrum slices belonging to the channel
Input PSD	Channel Input power in term of PSD at COM-RX input port
Input Power	Channel Input power at COM-RX input port
Channel PSD	Channel power in term of PSD after the WB block. It should be next to the PSD target less than the PSD Correction Tolerance parameter shown by the command
Channel Power	Channel power after the WB block
PSD Discrepancy	Current error margin between the Channel PSD and the Configured Target PSD. It the value increases above the PSD Correction Tolerance, a new regulation sequence starts.
Attenuation	The attenuation value configured on the WB to reach the target.

Table 4. Channel APC per-channel status definitions
Channel Status	Description
Active	Channel is managed and matches target PSD at WB output.
Not Active	Channel power insufficient to reach target PSD; channel is blocked or inactive.
Regulating	Channel is currently undergoing PSD adjustment.
Out Of Range	Channel PSD too high or too low to be active even with max or zero attenuation.

Procedure

To view channel APC information, use the show olc channel-apc regulation-info command.

Example:

RP/0/RP0/CPU0:IOS#show olc channel-apc regulation-info

Thu Jul 17 16:06:13.213 CEST

 

Controller                               : Ots0/0/0/0

Internal Status                          : IDLE

Input Gain                               : 8.0 dB

Input Gain Range                         : Normal

Input Gain Range Min - Max               : 5.0 - 11.0 dB

Last Correction                          : 2025-07-17 14:23:18

Output PSD Target                        : -20.0 dBm/12.5GHz

PSD Correction Tolerance                 : 0.3 dB

 

 

Controller          Center       Width      Status          Spectrum       Input          Input       Channel        Channel     PSD           Attenuation

                     Frequency    (GHz)                      6.25 GHz       PSD            Power       PSD            Power       Discrepancy   (dB)

                     (THz)                                   Slices Range   (dBm/12.5GHz)  (dBm)       (dBm/12.5GHz)  (dBm)       (dBm)         

============================================================================================================================================================

Ots-Och0/0/0/0/1    196.100000   75.000     Not Active      779 - 790      -50.00         -50.00      -50.00         -50.00      -             25.00

Ots-Och0/0/0/0/2    196.025000   75.000     Active          767 - 778      -24.22         -18.10      -19.97         -14.00      0.03          0.10

Ots-Och0/0/0/0/3    195.950000   75.000     Not Active      755 - 766      -50.00         -50.00      -50.00         -50.00      -             25.00

Note

APC periodically monitors the per channel Power Spectral Density (PSD) discrepancy. If the measured discrepancy exceeds the PSD Correction Tolerance, the APC initiates regulation on the Line Controller to reduce each channel's discrepancy below the defined tolerance. This regulation ensures a flat spectrum before the EDFA facing the LINE port.

The regulation process may take a few seconds to complete.

During this time, the APC status transitions and eventually reaches the final state IDLE.

The values displayed by the command show olc channel-apc controller Ots0/0/0/0 regulation-info reflect the state of the LC at the moment the command is executed.

Because the regulation is ongoing during this period, some values shown may already reflect the final regulated state, while others may not yet have updated to the final values.

This behavior is important to understand when interpreting the output of the channel APC regulation status, as transient discrepancies in the displayed data can occur during the regulation process.

Channel input power management parameters

A channel input power management parameter is a configuration setting that

defines and monitors channel input power levels,
enables logic for blocking or accepting channels based on minimum input power, and
facilitates automatic BST1 gain configuration and channel input power monitoring through alarms.

Table 5. Feature History
Feature Name	Release Information	Feature Description
Enhanced Channel Automatic Power Control (APC) support on EDFA2 Card	Cisco IOS XR Release 25.4.1	This feature introduces enhanced channel control and management on the EDFA2 card, enhancing configuration and management capabilities. It allows users to configure the expected input power at full channel load as a single, unified parameter, streamlining previous legacy BST1 configurations with new CLI commands. These commands automatically configure BST1 gain and facilitate the raising or clearing of two new alarms per channel for improved monitoring. Additionally, this feature enables users to control the initial setup of channels, amplifiers, and thresholds required for Metro Open Line System (MOLS) deployment. New Alarms introduced: OLC_APC_FM_CHANNEL_LOW_INPUT_POWER OLC_APC_FM_CHANNEL_HIGH_INPUT_POWER New CLI commands introduced: `channel-minimum-input-psd` `expected-total-input-power` `channel-rx-power-low-rel-thr` `channel-rx-power-high-rel-thr` You can configure these commands using the OpenConfig model. The transport line common model is augmented to support channel configuration on the EDFA2 card.

These sections provide detailed information on specific channel input power management parameters and their functionalities:

Channel Minimum Input PSD: This parameter determines if a channel is blocked at the Wavelength Blocker or accepted and controlled to a configured PSD target. A channel is blocked if its input power is lower than the calculated channel_minimum_input_power. This configuration overrides legacy channel acceptance or blocking criteria. A hysteresis of 0.5 dBm is implemented to prevent continuous blocking or activation.

channel_minimum_input_power = channel-minimum-input-psd + 10*log10(channel_width/12.5)

Note

channel-minimum-input-psd misconfiguration may cause traffic to drop.

Channels Expected Total Input Power: This parameter allows for automatic BST1 configuration by the Channel APC application and enables monitoring of each channel's input power through low and high alarms. BST1 auto-configuration is active only when Channel APC is configured in flat-psd-eq-mode.

expected_channel_input_power = expected-total-input-power - 10*log10(full_spectrum_in_ghz / 12.5) + 10*log10(channel_width / 12.5)

These conditions trigger alarms:

Channel low input power alarm: channel_input_power < expected_channel_input_power + channel-rx-power-low-rel-thr

Example:0/S/NXR0        Minor        Software         01/08/2025 19:22:11 UTC    Ots0/S/0/1/C_ID - Input channel power below the minimum expected
Channel high input power alarm: channel_input_power > expected_channel_input_power + channel-rx-power-high-rel-thr

Example:0/0/NXR0        Minor        Software         01/08/2025 19:22:11 UTC    Ots-Och0/0/0/1/1 - Input channel power above the maximum expected

Adding a hysteresis of 0.5 dB to the clear threshold prevents alarm flickering. Channel high/low input power alarms function independently and do not require Channel APC to be enabled.

Note

expected-total-input-power misconfiguration may cause traffic to drop.

This table illustrates how different configuration parameters enable specific functionalities.

Table 6. Configuration and features matrix
Configuration parameters	Default value	New channel blocking or activation policy	BST1 auto-config	Channel low/high input power alarms
channel-apc	NA	Must be set to flat-psd-eq-mode	Must be set to flat-psd-eq-mode	No impact
channel-minimum-input-psd	NA	Must be set to any valid value	No impact	No impact
expected-total-input-power	NA	No impact	Must be set to any valid value	Must be set to any valid value
channel-rx-power-low-rel-thr	-3 dB	No impact	No impact	Default or set to any valid value
channel-rx-power-high-rel-thr	+3 dB	No impact	No impact	Default or set to any valid value

BST1 gain settings

The BST1 gain is set by the Channel APC application based on the expected-total-input-power configured using this simple Look-Up Table (LUT):

Table 7. BST1 gain mode and setpoint
expected-total-input-power	BST1 gain mode	BST1 gain setpoint
> 3.5dBm	Normal	8 dB
<= 3.5dBm	Extended	18.5 dB

Configure channel input power management parameters

Use this task to configure the channel minimum input PSD, expected total input power, and channel RX power thresholds for optical line control.

These configurations enable new channel blocking and activation policies, automatic BST1 gain configuration, and channel input power monitoring.

Note

channel-minimum-input-psd or expected-total-input-power misconfiguration may cause traffic to drop.

Procedure

Enter global configuration mode.
Example:
```
RP/0/RP0/CPU0:ios#conf
```
Access optical line control configuration.
Example:
```
RP/0/RP0/CPU0:ios#(config)#optical-line-control
```
Specify the controller for which you want to configure the parameters.
Example:
```
RP/0/RP0/CPU0:ios#(config-olc)#controller ots
0/0/0/1
```
Configure channel-minimum-input-psd. If not configured, the legacy channel policy is applied.
Example:
```
RP/0/RP0/CPU0:ios#(config-olc-ots)#channel-minimum-input-psd
<value>
```
Enter the channel-minimum-input-psd in the range -40.0 dBm per 12.5 GHz to 23.0 dBm per 12.5 GHz in increments of 0.1 dBm per 12.5 GHz.
Configure expected-total-input-power. If not configured, automatic BST1 configuration and input channel alarms are disabled.
Example:
```
RP/0/RP0/CPU0:ios#(config-olc-ots)#expected-total-input-power
<value>
```
Enter the expected-total-input-power in the range -40.0 dBm to 23.0 dBm in increments of 0.1 dBm.
Configure channel-rx-power-low-rel-thr.The default value is -3dB.
Example:
```
RP/0/RP0/CPU0:ios#(config-olc-ots)#channel-rx-power-low-rel-thr
<value>
```
Enter the threshold in the range -20.0 dB to -1.0 dB in increments of 0.1 dB.
Configure channel-rx-power-high-rel-thr. The default value is +3dB.
Example:
```
RP/0/RP0/CPU0:ios#(config-olc-ots)#channel-rx-power-high-rel-thr
<value>
```
Enter the threshold in the range 1.0 dB to 20.0 dB in increments of 0.1 dB.

Commit the changes and exit configuration mode.

Example:


RP/0/RP0/CPU0:ios#(config-olc-ots)#commit
RP/0/RP0/CPU0:ios#(config-olc-ots)#root
RP/0/RP0/CPU0:ios#(config)#exit

The channel input power management parameters are configured, enabling new blocking/activation policies, BST1 auto-configuration, and channel RX power alarms based on your settings.

What to do next

Verify the configuration using the operational CLI show olc channel-apc controller.

Verify channel APC regulation information

Use this task to display the current Channel APC regulation status and channel-specific power information.

This command helps you monitor the effects of your channel input power management configurations. The output varies based on whether expected-total-input-power or channel-minimum-input-psd are configured.

If expected-total-input-power is not configured, the Expected Input Pwr column is not shown.
If expected-total-input-power is configured, the Input PSD column is not shown.
If channel-minimum-input-psd is not configured, the Minimum Input Pwr column is not shown.

Note

This command is valid only for NCS 1014 platforms; on other platforms, it produces an empty output.

The optical line controller must be active and configured.

Procedure

Execute the show olc channel-apc controller command to view regulation details.

Example:


RP/0/RP0/CPU0:kepler-4-1#show olc channel-apc controller Ots0/0/0/0 regulation-info
Thu Jun 12 15:30:52.855 CEST

Controller                               : Ots0/0/0/0
Internal Status                          : IDLE
Input Gain                               : 18.5 dB
Input Gain Range                         : Extended
Input Gain Range Min - Max               : 17.0 - 23.0 dB
Last Correction                          : 2025-06-12 15:29:51
Output PSD Target                        : -20.0 dBm/12.5Ghz
PSD Correction Tolerance                 : 0.3 dB

 Controller          Center       Width      Status          Spectrum       Input          Input       Expected    Minimum     Channel        Channel     PSD           Attenuation
                     Frequency    (GHz)                      6.25 GHz       PSD            Power       Input Pwr   Input Pwr   PSD            Power       Discrepancy   (dB)
                     (THz)                                   Slices Range   (dBm/12.5GHz)  (dBm)       (dBm)       (dBm)       (dBm/12.5GHz)  (dBm)       (dB)           
====================================================================================================================================================================================
 Ots-Och0/0/0/0/1    194.000000   100.000    Active          441 - 456      -23.27         -17.30      -14.81      -25.97      -20.27         -14.30      -0.27         12.60
 Ots-Och0/0/0/0/2    196.025000   100.000    Active          765 - 780      -24.15         -18.00      -14.81      -25.97      -20.17         -14.00      -0.17         10.30
 Ots-Och0/0/0/0/10   195.000000   150.000    Not Active      597 - 620      -90.00         -90.00      -13.05      -24.21      -90.00         -90.00      -             25.00
 Ots-Och0/0/0/0/50   191.375000   100.000    Not Active      21 - 36        -90.00         -90.00      -14.81      -25.97      -90.00         -90.00      -             25.00

The system displays detailed regulation information, including input gain, output PSD target, and per-channel power status, reflecting the configured channel input power management parameters.

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