Introduction to Intersight Managed Mode Server BIOS Tokens
Intersight Managed Mode provides two methods for making global modifications to the BIOS settings on servers in Cisco UCS domain. You can create one or more BIOS policies that include a specific grouping of BIOS settings that match the needs of a server or set of servers, or you can use the Cisco provided predefined BIOS policy settings which are optimized for particular server platforms and use cases.
Both the BIOS policy and the default BIOS settings for a server platform enables you to fine tune the BIOS settings for a server managed by IMM.
Depending on the specific workload requirements of a data center such as CPU-intensive, I/O-intensive, or energy-efficient operations and so on, Cisco provides optimized, ready-to-use BIOS token configurations. These configurations are designed to streamline policy deployment and enhance system performance by aligning BIOS settings with workload demands. Additionally, custom policies can be created to meet unique requirements.
Cisco Intersight Managed Mode supports the following M5, M6, M7, and M8 servers:
-
Cisco UCS C220 M8, Cisco UCS C240 M8, Cisco UCS X210c M8 Compute Node

Note
This platform is supported from 4.3(6a) onwards.
-
Cisco UCS C225 M8 and Cisco UCS X215c M8 Compute Node

Note
This platform is supported from 4.3(5a) onwards.
-
Cisco UCS C245 M8
-
Cisco UCS X210c M7 Compute Node
-
Cisco UCS X410c M7 Compute Node
-
Cisco UCS X210c M6 Compute Node
-
Cisco UCS C220 M7
-
Cisco UCS C240 M7
-
Cisco UCS C220 M6
-
Cisco UCS C225 M6
-
Cisco UCS C240 M6
-
Cisco UCS C245 M6
-
Cisco UCS C220 M5
-
Cisco UCS C240 M5
-
Cisco UCS C480 M5
-
Cisco UCS B200 M6
-
Cisco UCS B200 M5
-
Cisco UCS B480 M5
![]() Note |
The Version column in the table denotes the minimum firmware version where the BIOS token is supported and its consecutive version support. |
![]() Note |
For tokens having long value description, the Values column can be seen blank. In this case, you can scroll down the column to see their values. |
![]() Note |
All tokens also include a 'Platform default' option. The Platform default is identified by the setting in bold font. The BIOS uses the value for this attribute contained in the BIOS defaults for the server type and vendor. |
What's New
![]() Note |
This document includes BIOS token information starting from 4.3(3a) and continue to cover all subsequent versions. It does not cover any versions prior to 4.3(3a). |
|
BIOS Token |
Platform |
New/Changed |
|---|---|---|
|
GPU Direct CPU1 |
X210 M8, X410 M8 |
New |
|
GPU Direct CPU2 |
X210 M8, X410 M8 |
New |
|
GPU Direct CPU3 |
X410 M8 |
New |
|
GPU Direct CPU4 |
X410 M8 |
New |
|
BIOS Token |
Platform |
New/Changed |
|---|---|---|
|
Uncore Frequency Scaling |
XE1X0M8 |
New |
|
Uncore Frequency Scaling IO |
XE1X0M8 |
New |
|
C1 Auto Demotion |
XE1X0M8 |
New |
|
C1 Auto UnDemotion |
XE1X0M8 |
New |
|
Partial Mirror percentage |
XE1X0M8 |
New |
|
PCIe Slot MSTOR RAID OptionROM |
XE1X0M8 |
New |
|
PCIe Slots CDN Control |
XE1X0M8 |
New |
|
PCIe Slot n Link Speed |
XE1X0M8 |
New |
|
PCIe Slot n Option ROM |
XE1X0M8 |
New |
|
PCIe RAS Support |
XE1X0M8 |
New |
|
Power ON Password |
XE1X0M8 |
New |
|
Multikey Total Memory Encryption (MK-TME) |
XE1X0M8 |
New |
|
Total Memory Encryption (TME) |
XE1X0M8 |
New |
|
SGX Auto MP Registration Agent |
XE1X0M8 |
New |
|
SGX QoS |
XE1X0M8 |
New |
|
SGX Write Enable |
XE1X0M8 |
New |
|
Sgx-Epoch |
XE1X0M8 |
New |
|
SProcessor Epoch 0 |
XE1X0M8 |
New |
|
SProcessor Epoch 1 |
XE1X0M8 |
New |
|
SGX PubKey Hashn |
XE1X0M8 |
New |
|
UMA |
XE1X0M8 |
New |
|
NUMA |
XE1X0M8 |
New |
|
Virtual Numa |
XE1X0M8 |
New |
|
LLC Dead Line |
XE1X0M8 |
New |
|
IPV6 HTTP Support |
XE1X0M8 |
New |
|
IPV4 HTTP Support |
XE1X0M8 |
New |
|
DMA Control Opt-In Flag |
XE1X0M8 |
New |
|
Error Check Scrub |
XE1X0M8 |
New |
|
PRMRR Size |
XE1X0M8 |
New |
|
Core Multi Processing |
XE1X0M8 |
New |
|
Select Owner EPOCH Input Type |
XE1X0M8 |
New |
|
IPV4 PXE Support |
XE1X0M8 |
New |
|
IPV6 PXE Support |
XE1X0M8 |
New |
|
Network Stack |
XE1X0M8 |
New |
|
Consistent Device Naming (CDN) Control |
XE1X0M8 |
New |
|
Enhanced Memory Test |
XE1X0M8 |
New |
|
BME DMA Mitigation |
XE1X0M8 |
New |
|
MMIO High Granularity Size |
XE1X0M8 |
New |
|
MMIO High Base |
XE1X0M8 |
New |
|
Select Memory RAS Configuration |
XE1X0M8 |
New |
|
Memory mapped IO above 4GB |
XE1X0M8 |
New |
|
Adjacent Cache Line Prefetcher |
XE1X0M8 |
New |
|
DFX OSB |
XE1X0M8 |
New |
|
Processor CMCI |
XE1X0M8 |
New |
|
Configurable TDP Level |
XE1X0M8 |
New |
|
Energy Performance |
XE1X0M8 |
New |
|
Enhanced Intel SpeedStep Tech |
XE1X0M8 |
New |
|
Processor EPP Profile |
XE1X0M8 |
New |
|
IOAT Configuration |
XE1X0M8 |
New |
|
Hardware Prefetcher |
XE1X0M8 |
New |
|
CPU Hardware Power Management |
XE1X0M8 |
New |
|
Intel Dynamic Speed Select |
XE1X0M8 |
New |
|
Intel HyperThreading Tech |
XE1X0M8 |
New |
|
Intel Turbo Boost Tech |
XE1X0M8 |
New |
|
Intel Speed Select |
XE1X0M8 |
New |
|
Intel Trusted Execution Technology Support |
XE1X0M8 |
New |
|
Intel(R) VT |
XE1X0M8 |
New |
|
DCU IP Prefetcher |
XE1X0M8 |
New |
|
KTI Prefetch |
XE1X0M8 |
New |
|
LLC Prefetch |
XE1X0M8 |
New |
|
XPT Prefetch |
XE1X0M8 |
New |
|
XPT Remote Prefetch |
XE1X0M8 |
New |
|
DCU Streamer Prefetch |
XE1X0M8 |
New |
|
Package C State |
XE1X0M8 |
New |
|
Patrol Scrub Configuration |
XE1X0M8 |
New |
|
Processor C1E |
XE1X0M8 |
New |
|
Processor C6 Report |
XE1X0M8 |
New |
|
EIST PSD Function |
XE1X0M8 |
New |
|
Sub Numa Clustering |
XE1X0M8 |
New |
|
Workload Configuration |
XE1X0M8 |
New |
|
USB Port Front |
XE1X0M8 |
New |
|
USB Port KVM |
XE1X0M8 |
New |
|
USB Port:M.2 Storage |
XE1X0M8 |
New |
|
Sha-1 |
XE1X0M8 |
New |
|
Sha256 |
XE1X0M8 |
New |
|
Sha384 |
XE1X0M8 |
New |
|
Trusted Platform Module State |
XE1X0M8 |
New |
|
Trust Domain Extension |
XE1X0M8 |
New |
|
TDX Secure Arbitration Mode (SEAM) Loader |
XE1X0M8 |
New |
|
TPM Pending Operation |
XE1X0M8 |
New |
|
TPM Minimal Physical Presence |
XE1X0M8 |
New |
|
Front NVME n Link Speed |
XE1X0M8 |
New |
|
Front NVME n Option rom |
XE1X0M8 |
New |
|
Baud Rate |
XE1X0M8 |
New |
|
CDN Control |
XE1X0M8 |
New |
|
Adaptive Memory Training |
XE1X0M8 |
New |
|
Adaptive Refresh Management Level |
XE1X0M8 |
New |
|
BIOS Techlog Level |
XE1X0M8 |
New |
|
OptionROM Launch Optimization |
XE1X0M8 |
New |
|
Console Redirection |
XE1X0M8 |
New |
|
Flow Control |
XE1X0M8 |
New |
|
FRB 2 Timer |
XE1X0M8 |
New |
|
OS Boot Watchdog Timer Policy |
XE1X0M8 |
New |
|
OS Watchdog Timer Timeout |
XE1X0M8 |
New |
|
OS Watchdog Timer Policy |
XE1X0M8 |
New |
|
Terminal Type |
XE1X0M8 |
New |
|
Boot Performance Mode |
XE1X0M8 |
New |
|
Select PPR Type |
XE1X0M8 |
New |
|
Memory Thermal Throttling Mode |
XE1X0M8 |
New |
|
Memory Size Limit in GB |
XE1X0M8 |
New |
|
QPI Link Frequency Select |
XE1X0M8 |
New |
|
IIO eDPC Support |
XE1X0M8 |
New |
|
P STATE Coordination |
XE1X0M8 |
New |
|
SGX Factory Reset |
XE1X0M8 |
New |
|
SGX Package Information In-Band Access |
XE1X0M8 |
New |
|
Security Device Support |
XE1X0M8 |
New |
|
LIMIT CPU PA to 46 Bits |
XE1X0M8 |
New |
|
Turbo Mode |
XE1X0M8 |
New |
|
Power Performance Tuning |
XE1X0M8 |
New |
|
CDN Support for LOM |
XE1X0M8 |
New |
|
Software Guard Extensions (SGX) |
XE1X0M8 |
New |
|
NUMA Optimized |
XE1X0M8 |
New |
|
Above 4G Decoding |
XE1X0M8 |
New |
|
Cores Enabled |
XE1X0M8 |
New |
|
Latency Optimized Mode |
XE1X0M8 |
New |
|
Runtime Post Package Repair |
XE1X0M8 |
New |
|
ACPI SRAT Special Purpose Memory Flag |
XE1X0M8 |
New |
|
UEFI Memory Map Special Purpose Memory Flag |
XE1X0M8 |
New |
|
Energy Efficient Turbo |
XE1X0M8 |
New |
|
Rank Margin Tool |
XE1X0M8 |
New |
|
Re-Size BAR Support |
XE1X0M8 |
New |
|
PreBoot DMA Protection |
XE1X0M8 |
New |
|
CPU Performance |
XE1X0M8 |
New |
|
Security Device Support |
XE1X0M8 |
New |
|
BIOS Token |
Platform |
New/Changed |
||
|---|---|---|---|---|
|
IIO eDPC Support |
X210c M8, X210c M7, X410c M7 |
New |
||
|
CDN Support for LOM |
C220 M8, C240 M8, X210c M8, X210c M7, X410c M7 |
Changed
|
|
BIOS Token |
Platform |
New/Changed |
|---|---|---|
|
IIO eDPC Support |
C225 M8, C245 M8, X215c M8 |
New |
|
Sub NUMA Clustering |
C220 M8, C240 M8, X210c M8 |
Changed |
|
BIOS Token |
Platform |
New/Changed |
|---|---|---|
|
Latency Optimized Mode |
C220 M8, C240 M8, X210c M8 |
New |
|
PreBoot DMA Protection |
C220 M8, C240 M8, X210c M8 |
New |
|
Runtime Post Package Repair |
C220 M8, C240 M8, X210c M8 |
New |
|
MLOM OptionROM |
C220 M8, C240 M8 |
New |
|
MLOM Link Speed |
C220 M8, C240 M8 |
New |
|
Rear NVME n Link Speed |
C240 M8 |
New |
| Rear NVME n OptionROM |
C240 M8 |
New |
|
PCIe Slot MSTOR RAID OptionROM |
C220 M8, C240 M8 |
New |
|
PCIe Slots CDN Control |
C220 M8, C240 M8 |
New |
|
Power ON Password |
C220 M8, C240 M8 |
New |
|
VGA Priority |
C220 M8, C240 M8 |
New |
|
USB Port Rear |
C220 M8, C240 M8 |
New |
|
USB Port Front |
X210c M8, X41c0 M8 |
New |
|
Multikey Total Memory Encryption (MK-TME) |
C220 M8, C240 M8, X210c M8 |
New |
|
Total Memory Encryption (TME) |
C220 M8, C240 M8, X210c M8 |
New |
|
SGX QoS |
C220 M8, C240 M8, X210c M8 |
New |
|
Select Owner EPOCH Input Type |
C220 M8, C240 M8, X210c M8 |
New |
|
SGX Write Enable |
C220 M8, C240 M8, X210c M8 |
New |
|
SGX Auto MP Registration Agent |
C220 M8, C240 M8, X210c M8 |
New |
|
Sgx-Epoch |
C220 M8, C240 M8, X210c M8 |
New |
| SProcessor Epoch 1 |
C220 M8, C240 M8, X210c M8 |
New |
|
SGX PubKey Hashn |
C220 M8, C240 M8, X210c M8 |
New |
|
UMA |
C220 M8, C240 M8, X210c M8 |
New |
|
NUMA Optimized |
C220 M8, C240 M8, X210c M8 |
New |
|
UPI Link Enablement |
C220 M8, C240 M8, X210c M8 |
New |
|
UPI Power Manangement |
C220 M8, C240 M8, X210c M8 |
New |
|
LLC Dead Line |
C220 M8, C240 M8, X210c M8 |
New |
|
Enhanced CPU Performance |
C240 M8, X210c M8 |
New |
|
IPV6 HTTP Support |
C220 M8, C240 M8, X210c M8 |
New |
|
IPV4 HTTP Support |
C220 M8, C240 M8, X210c M8 |
New |
|
DMA Control Opt-In Flag |
C220 M8, C240 M8, X210c M8 |
New |
|
Error Check Scrub |
C220 M8, C240 M8, X210c M8 |
New |
|
PRMRR Size |
C220 M8, C240 M8, X210c M8 |
New |
|
UEFI Memory Map Special Purpose Memory Flag |
C220 M8, C240 M8, X210c M8 |
New |
|
ACPI SRAT Special Purpose Memory Flag |
C220 M8, C240 M8, X210 M8 |
New |
|
Re-Size BAR Support |
C220 M8, C240 M8, X210c M8 |
New |
|
Core Multi Processing |
C220 M8, C240 M8, X210c M8 |
New |
|
Select Owner EPOCH Input Type |
C220 M8, C240 M8 |
New |
|
VMD Enablement |
C220 M8, C240 M8, X210c M8 |
New |
|
IPV4 PXE Support |
C220 M8, C240 M8, X210c M8 |
New |
|
IPV6 PXE Support |
C220 M8, C240 M8, X210c M8 |
New |
|
Network Stack |
C220 M8, C240 M8, X210c M8 |
New |
|
MRAIDn Link Speed |
C240 M8 |
New |
|
MRAID n OptionROM |
C240 M8 |
New |
|
MRAID Option ROM |
C220 M8 |
New |
|
MRAID Link Speed |
C220 M8 |
New |
|
Consistent Device Naming (CDN) Control |
C220 M8, C240 M8, X210c M8 |
New |
|
Enhanced Memory Test |
C220 M8, C240 M8, X210c M8 |
New |
|
BME DMA Mitigation |
C220 M8, C240 M8, X210c M8 |
New |
|
MMIO High Granularity Size |
C220 M8, C240 M8, X210c M8 |
New |
|
MMIO High Base |
C220 M8, C240 M8, X210c M8 |
New |
|
Partial Mirror percentage |
C220 M8, C240 M8, X210c M8 |
New |
|
Memory RAS Configuration |
C220 M8, C240 M8, X210c M8 |
New |
|
Memory mapped IO above 4GB |
C220 M8, C240 M8, X210c M8 |
New |
|
PRMRR Size |
C220 M8, C240 M8, X210c M8 |
New |
|
Adjacent Cache Line Prefetcher |
C220 M8, C240 M8, X210c M8 |
New |
|
DFX OSB |
X210c M8 |
New |
|
Processor CMCI |
C220 M8, C240 M8, X210c M8 |
New |
|
Configurable TDP Level |
C220 M8, C240 M8, X210c M8 |
New |
|
Energy Performance |
C220 M8, C240 M8, X210c M8 |
New |
|
Enhanced Intel SpeedStep Tech |
C220 M8, C240 M8, X210c M8 |
New |
|
Processor EPP Profile |
C220 M8, C240 M8, X210c M8 |
New |
|
IOAT Configuration |
C220 M8, C240 M8, X210c M8 |
New |
|
Hardware Prefetcher |
C220 M8, C240 M8, X210c M8 |
New |
|
CPU Hardware Power Management |
C220 M8, C240 M8, X210c M8 |
New |
|
Intel Dynamic Speed Select |
C220 M8, C240 M8, X210c M8 |
New |
|
Intel HyperThreading Tech |
C220 M8, C240 M8, X210c M8 |
New |
|
Intel Turbo Boost Tech |
C220 M8, C240 M8, X210c M8 |
New |
|
Intel(R) VT |
C220 M8, C240 M8, X210c M8 |
New |
|
DCU IP Prefetcher |
C220 M8, C240 M8, X210c M8 |
New |
|
KTI Prefetch |
C220 M8, C240 M8, X210c M8 |
New |
|
LLC Prefetch |
C220 M8, C240 M8, X210c M8 |
New |
|
Package C State |
C220 M8, C240 M8, X210c M8 |
New |
|
Patrol Scrub Configuration |
C220 M8, C240 M8, X210c M8 |
New |
|
Processor C1E |
C220 M8, C240 M8, X210c M8 |
New |
|
Processor C6 Report |
C220 M8, C240 M8, X210c M8 |
New |
|
P STATE Coordination |
C220 M8, C240 M8, X210c M8 |
New |
|
UPI Link Speed |
C220 M8, C240 M8, X210c M8 |
New |
|
Sub Numa Clustering |
C220 M8, C240 M8, X210c M8 |
New |
|
Uncore Frequency Scaling |
C220 M8, C240 M8, X210c M8 |
New |
|
Workload Configuration |
C220 M8, C240 M8, X210c M8 |
New |
|
XPT Prefetch |
C220 M8, C240 M8, X210 M8 |
New |
|
Intel Speed Select |
C220 M8, C240 M8, X210c M8 |
New |
|
USB Port KVM |
X210c M8 |
New |
|
USB Port:M.2 Storage |
X210 M8 |
New |
|
Sha-1 |
C220 M8, C240 M8, X210c M8 |
|
|
Sha256 |
C220 M8, C240 M8, X210c M8 |
New |
|
Sha384 |
C220 M8, C240 M8, X210c M8 |
New |
|
Trusted Platform Module State |
C220 M8, C240 M8, X210c M8 |
New |
|
Trust Domain Extension |
C220 M8, C240 M8, X210c M8 |
New |
|
TDX Secure Arbitration Mode (SEAM) Loader |
C220 M8, C240 M8, X210c M8 |
New |
|
TPM Pending Operation |
C220 M8, C240 M8, X210c M8 |
New |
|
TPM Minimal Physical Presence |
C220 M8, C240 M8, X210c M8 |
New |
|
Intel Trusted Execution Technology Support |
C220 M8, C240 M8, X210c M8 |
New |
|
Rear NVME nLink Speed |
C240 M8 |
New |
|
Rear NVME noption rom |
C240 M8 |
New |
|
Front NVME n Link Speed |
C220 M8, C240 M8 |
New |
|
Front NVME n ption rom |
C220 M8, C240 M8 |
New |
|
Baud Rate |
C220 M8, C240 M8, X210c M8 |
New |
| CDN Control | C220 M8, C240 M8, X210c M8 |
New |
|
Adaptive Memory Training |
C220 M8, C240 M8, X210c M8 |
New |
|
BIOS Techlog Level |
C220 M8, C240 M8, X210c M8 |
New |
|
OptionROM Launch Optimization |
C220 M8, C240 M8, X210c M8 |
New |
|
Console Redirection |
C220 M8, C240 M8, X210c M8 |
New |
|
Flow Control |
C220 M8, C240 M8, X210c M8 |
New |
|
FRB 2 Timer |
C220 M8, C240 M8, X210c M8 |
New |
|
OS Boot Watchdog Timer Policy |
C220 M8, C240 M8, X210c M8 |
New |
|
OS Watchdog Timer Timeout |
C220 M8, C240 M8, X210c M8 |
New |
|
OS Watchdog Timer |
C220 M8, C240 M8, X210c M8 |
New |
|
Terminal Type |
C220 M8, C240 M8, X210c M8 |
New |
|
PCIe Slot:MLOM Link Speed |
C220 M8, C240 M8 |
New |
|
PCIe Slot n Link Speed |
C220 M8, C240 M8 |
New |
|
PCIe Slot n Option ROM |
C220 M8, C240 M8 |
New |
|
PCIe Slot:MLOM OptionROM |
C220 M8, C240 M8 |
New |
|
Boot Performance Mode |
C220 M8, C240 M8, X210c M8 |
New |
|
Select PPR Type |
C220 M8, C240 M8, X210c M8 |
New |
|
PCIe RAS support |
C220 M8, C240 M8, X210c M8 |
New |
|
Memory Thermal Throttling Mode |
C220 M8, C240 M8, X210c M8 |
New |
|
Memory Size Limit in GB |
C220 M8, C240 M8, X210c M8 |
New |
|
External SSC Enable |
C220 M8, C240 M8, X210c M8 |
New |
|
QPI Link Frequency Select |
C220 M8, C240 M8, X210c M8 |
New |
|
IIO eDPC Support |
C220 M8, C240 M8 |
New |
|
DCU Streamer Prefetch |
C220 M8, C240 M8, X210c M8 |
New |
|
P STATE Coordination |
C220 M8, C240 M8, X210c M8 |
New |
|
SGX Factory Reset |
C220 M8, C240 M8, X210c M8 |
New |
|
SGX Package Information In-Band Access |
C220 M8, C240 M8, X210c M8 |
New |
|
Security Device Support |
C220 M8, C240 M8, X210c M8 |
New |
|
LIMIT CPU PA to 46 Bits |
C220 M8, C240 M8, X210c M8 |
New |
|
BIOS Token |
Platform |
New/Changed |
|---|---|---|
|
UEFI Memory Map Special Purpose Memory Flag |
C220 M7, C240 M7, X210c M7, X410c M7 |
New |
|
ACPI SRAT Special Purpose Memory Flag |
C220 M7, C240 M7, X210c M7, X410c M7 | New |
| CCD Control | C245 M8, C225 M8, X215c M8 | Changed |
| Power Profile Selection F19h | C245 M8, C225 M8, X215c M8 | Changed |
| CPU Downcore control F19 M10h-1Fh | C245 M8, C225 M8, X215c M8 | Changed |
|
BIOS Token |
Platform |
New/Changed |
|---|---|---|
| PCIe Slot:MLOM Link Speed | C225 M8 | New |
| PCIe Slot:MLOM OptionROM | C225 M8 | New |
| PCIe Slot n OptionROM | C225 M8 | New |
| PCIe Slot MSTOR Link Speed | C225 M8 | New |
| PCIe Slot MSTOR RAID OptionRO | C225 M8 | New |
| MRAID n Link Speed | C225 M8 | New |
| MRAID n OptionROM | C225 M8 | New |
| Front NVME n Link Speed | C225 M8 | New |
| Front NVME n OptionROM | C225 M8 | New |
| Rear NVME n Link Speed | C225 M8 | New |
| Rear NVME n OptionROM | C225 M8 | New |
| VGA Priority | C225 M8 | New |
| FRB 2 Timer | C225 M8, X215c M8 | New |
| OS Watchdog Timer Policy | C225 M8, X215c M8 | New |
| OS Watchdog Timer Timeout | C225 M8, X215c M8 | New |
| OS Watchdog Timer | C225 M8, X215c M8 | New |
| Flow Control | C225 M8, X215c M8 | New |
| Baud rate | C225 M8, X215c M8 | New |
| Terminal type | C225 M8, X215c M8 | New |
| Console redirection | C225 M8, X215c M8 | New |
| Security Device Support | C225 M8, X215c M8 | New |
| Trusted Platform Module State | C225 M8, X215c M8 | New |
| SHA-1 PCR Bank | C225 M8, X215c M8 | New |
| SHA256-PCR-Bank | C225 M8, X215c M8 | New |
| SHA384 PCR Bank | C225 M8, X215c M8 | New |
| Above 4G Decoding | C225 M8, X215c M8 | New |
| CDN Control | C225 M8, X215c M8 | New |
| PCIe Slots CDN Control | C225 M8, X215c M8 | New |
| Power ON Password | C225 M8, X215c M8 | New |
| Core Performance Boost | C225 M8, X215c M8 | New |
| Ln Stream HW Prefetcher | C225 M8, X215c M8 | New |
| NUMA Nodes per Socket | C225 M8, X215c M8 | New |
| Chipselect Interleaving | C225 M8, X215c M8 | New |
| Bank Group Swap | C225 M8, X215c M8 | New |
| Determinism Slider | C225 M8, X215c M8 | New |
| IPv4 PXE Support | C225 M8, X215c M8 | New |
| IPV6 PXE Support | C225 M8, X215c M8 | New |
| IOMMU | C225 M8, X215c M8 | New |
| SMT Mode | C225 M8, X215c M8 | New |
| CPU Downcore control F19 M10h-1Fh | C225 M8, X215c M8 | New |
| Downcore control F19 MA0h-AFh | C225 M8, X215c M8 | New |
| SR-IOV Support | C225 M8, X215c M8 | New |
| SMEE | C225 M8, X215c M8 | New |
| BIOS Techlog Level | C225 M8, X215c M8 | New |
| OptionROM Launch Optimization | C225 M8, X215c M8 | New |
| PCIe ARI Support | C225 M8, X215c M8 | New |
| Re-Size BAR Support | C225 M8, X215c M8 | New |
| TSME | C225 M8, X215c M8 | New |
| IPv4 HTTP Support | C225 M8, X215c M8 | New |
| IPv6 HTTP Support | C225 M8, X215c M8 | New |
| Network Stack | C225 M8, X215c M8 | New |
| SEV-SNP Support | C225 M8, X215c M8 | New |
| CPPC | C225 M8, X215c M8 | New |
| Power Profile Selection F19h | C225 M8, X215c M8 | New |
| SNP Memory Coverage | C225 M8, X215c M8 | New |
| SNP Memory Size to Cover in MB | C225 M8, X215c M8 | New |
| BME DMA Mitigation | C225 M8, X215c M8 | New |
| Post Package Repair | C225 M8, X215c M8 | New |
| Runtime Post Package Repair | C225 M8, X215c M8 | New |
| APBDIS | C225 M8, X215c M8 | New |
| CCD Control | C225 M8, X215c M8 | New |
| Streaming Stores Control | C225 M8, X215c M8 | New |
| ACPI SRAT L3 Cache As NUMA Domain | C225 M8, X215c M8 | New |
| DF C-States | C225 M8, X215c M8 | New |
| SEV-ES ASID Space Limit | C225 M8, X215c M8 | New |
| Local APIC Mode | C225 M8, X215c M8 | New |
| DRAM Scrub Time | C225 M8, X215c M8 | New |
| PCIe Ten Bit Tag Support | C225 M8, X215c M8 | New |
| 4-link xGMI max speed | C225 M8, X215c M8 | New |
| Memory Interleaving | C225 M8, X215c M8 | New |
| DF PState Frequency Optimizer | C225 M8, X215c M8 | New |
| AVX512 | C225 M8, X215c M8 | New |
| Power Down Enable | C225 M8, X215c M8 | New |
| xGMI Force Link Width | C225 M8, X215c M8 | New |
| Memory Refresh Rate | C225 M8, X215c M8 | New |
| TPM Pending Operation | C225 M8, C245 M8, X215c M8 | New |
| Enhanced Memory Test | C225 M8, C245 M8, X215c M8 | New |
| Enhanced CPU Performance | C225 M8, C245 M8, X215c M8 | New |
| Burst and Postponed Refresh | C225 M8, C245 M8, X215c M8 | New |
| Global C State Control | C225 M8, C245 M8, X215c M8 | Changed |
|
BIOS Token |
Platform |
New/Changed |
|---|---|---|
| DF PState Frequency Optimizer |
C245 M8 |
New |
| AVX512 |
C245 M8 |
New |
| Power Down Enable |
C245 M8 |
New |
| Fixed SOC P-State SP5 F19h |
C245 M8 |
New |
| xGMI Force Link Width |
C245 M8 |
New |
| 4-link xGMI max speed |
C245 M8 |
New |
| SEV-ES ASID Space Limit |
C245 M8 |
New |
| Runtime Post Package Repair |
C245 M8 |
New |
| Re-Size BAR Support |
C245 M8 |
New |
| Power Profile Selection F19h |
C245 M8 |
New |
| CPU Downcore control F19 M10h-1Fh |
C245 M8 |
New |
|
Downcore control F19 MA0h-AFh |
C245 M8 |
New |
|
CPPC |
C245 M8 |
New |
|
SMT Mode |
C245 M8 |
New |
|
SVM Mode |
C245 M8 |
New |
|
IPV4 HTTP Support |
C245 M8 |
New |
|
IPV6 HTTP Support |
C245 M8 |
New |
|
IPV4 PXE Support |
C245 M8 |
New |
|
IPV6 PXE Support |
C245 M8 |
New |
|
PCIe ARI Support |
C245 M8 |
New |
|
MRAID n Link Speed |
C245 M8 |
New |
|
MRAID n OptionROM |
C245 M8 |
New |
|
PCIe Slot MSTOR Link Speed |
C245 M8 |
New |
|
PCIe Slot n Link Speed |
C245 M8 |
New |
|
Front NVME n Link Speed |
C245 M8 |
New |
|
Front NVME n OptionROM |
C245 M8 |
New |
|
PCIe Slot:MLOM Link Speed |
C245 M8 |
New |
|
PCIe Slot:MLOM OptionROM |
C245 M8 |
New |
|
PCIe Slot n OptionROM |
C245 M8 |
New |
|
Rear NVME n Link Speed |
C245 M8 |
New |
|
Rear NVME n OptionROM |
C245 M8 |
New |
|
Single Root I/O Virtualization (SR-IOV) Support |
C245 M8 |
New |
|
PCIe Slots CDN Control |
C245 M8 |
New |
|
Consistent Device Naming |
C245 M8 |
New |
|
BME DMA Mitigation |
C245 M8 |
New |
|
Burst and Postponed Refresh |
C245 M8 |
New |
|
IOMMU |
C245 M8 |
New |
|
Bank Group Swap |
C245 M8 |
New |
|
Chipset Interleave |
C245 M8 |
New |
|
DRAM Scrub Time |
C245 M8 |
New |
|
Post Package Repair |
C245 M8 |
New |
|
SMEE |
C245 M8 |
New |
|
Memory Mapped IO above 4GB |
C245 M8 |
New |
|
VGA Priority |
C245 M8 |
New |
|
Core Performance Boost |
C245 M8 |
New |
|
Global C State Control |
C245 M8 |
New |
|
Ln Stream HW |
C245 M8 |
New |
|
Determinism Slider |
C245 M8 |
New |
|
Transparent Secure Memory Encryption |
C245 M8 |
New |
|
Burst and Postponed Refresh |
C245 M8 |
New |
|
APBDIS |
C245 M8 |
New |
|
Streaming Stores Control |
C245 M8 |
New |
|
DF C-States |
C245 M8 |
New |
|
CCD Control |
C245 M8 |
New |
|
ACPI SRAT L3 Cache As NUMA Domain |
C245 M8 |
New |
|
Local APIC Mode |
C245 M8 |
New |
|
PCIe Ten Bit Tag Support |
C245 M8 |
New |
|
SMT Mode |
C245 M8 |
New |
|
Baud Rate |
C245 M8 |
New |
|
BIOS Techlog Level |
C245 M8 |
New |
|
OptionROM Launch Optimization |
C245 M8 |
New |
|
Console Redirection |
C245 M8 |
New |
|
Flow Control |
C245 M8 |
New |
|
FRB-2 Timer |
C245 M8 |
New |
|
OS Boot Watchdog Timer |
C245 M8 |
New |
|
OS Boot Watchdog Timer Policy |
C245 M8 |
New |
|
OS Boot Watchdog Timer Timeout |
C245 M8 |
New |
|
Terminal Type |
C245 M8 |
New |
|
SHA-1 PCR Bank |
C245 M8 |
New |
|
SHA256 PCR Bank |
C245 M8 |
New |
|
SHA384 PCR Bank |
C245 M8 |
New |
|
Trusted Platform Module State |
C245 M8 |
New |
|
Security Device Support |
C245 M8 |
New |
|
Memory Interleaving |
C245 M8 |
Changed |
|
Dram Scrub Time |
C245 M8 |
Changed |
|
CCD Control |
C245 M8 |
Changed |
|
SEV-SNP Support |
C245 M8 |
Changed |
|
Memory Refresh Rate |
C245 M8 |
Changed |
|
BIOS Token |
Platform |
New/Changed |
|---|---|---|
|
DFX OSB |
X410c M7, X210c M7 |
New |
| SHA384 PCR Bank* |
C225 M6, C245 M6, C220 M6, C240 M6, x210 M6, B200 M6 |
New |
| Local APIC Mode* |
C245 M6, C225 M6 |
New |
|
DRAM Scrub Time |
C245 M6, C225 M6 |
New |
|
Memory Interleaving |
C245 M6, C225 M6 |
New |
|
PCIe Ten Bit Tag Support |
C245 M6, C225 M6 |
New |
|
EDC Control Throttle |
C245 M6, C225 M6 |
New |
|
DLWM Support |
C245 M6, C225 M6 |
New |
|
Memory Clock Speed 7xx3 (AMD 3rd Gen CPU) |
C245 M6, C225 M6 |
New |
|
Memory Clock Speed 7xx2 (AMD 2nd Gen CPU) |
C245 M6, C225 M6 |
New |
|
xGMI Link Configuration |
C245 M6, C225 M6 |
New |
|
Preferred IO 7xx3 (AMD 3rd Gen CPU) |
C245 M6, C225 M6 |
New |
|
Preferred IO 7xx2 (AMD 2nd Gen CPU) |
C245 M6, C225 M6 |
New |
|
Core Watchdog Timer Enable |
C245 M6, C225 M6 |
New |
|
Serial Mux |
C245 M6, C225 M6 |
New |
|
Memory Refresh Rate |
C245 M6, C225 M6 |
New |
|
Power Performance Tuning |
X410c M7, X210c M7, C220 M7, C240 M7 |
New |
| PRMRR Size |
X410c M7, X210c M7, C220 M7, C240 M7 |
Changed |
|
DCPMM Firmware Downgrade |
X410c M7, X210c M7, C220 M7, C240 M7 |
Deprecated |
|
CR QoS |
X410c M7, X210c M7, C220 M7, C240 M7 |
Deprecated |
|
NVM Performance Setting |
X410c M7, X210c M7, C220 M7, C240 M7 |
Deprecated |
|
CR FastGo Config |
X410c M7, X210c M7, C220 M7, C240 M7 |
Deprecated |
| Snoopy mode for AD |
X410c M7, X210c M7, C220 M7, C240 M7 |
Deprecated |
|
Snoopy for 2LM |
X410c M7, X210c M7, C220 M7, C240 M7 |
Deprecated |
|
Volatile Memory Mode |
X410c M7, X210c M7, C220 M7, C240 M7 |
Deprecated |
|
eADR |
X410c M7, X210c M7, C220 M7, C240 M7 |
Deprecated |
|
Memory Bandwidth Boost |
X410c M7, X210c M7, C220 M7, C240 M7 |
Deprecated |
![]() Note |
SHA384 PCR Bank Bios token supports PID models UCS-TPM-002D and UCS-TPM-002D-D. |
![]() Note |
For Local APIC Mode Bios token, Compatability values are not supported for AMD EPYC 7XX2 series. |
|
BIOS Token |
Platform |
New/Changed |
|---|---|---|
|
MMIO High Granularity Size |
X410c M7, X210c M7, C220 M7, C240 M7 |
New |
|
MMIO High Base |
X410c M7, X210c M7, C220 M7, C240 M7 |
New |
|
IOAT Configuration |
X410c M7, X210c M7, C220 M7, C240 M7 |
New |
|
BIOS Token |
Platform |
New/Changed |
|---|---|---|
|
Trust Domain Extension (TDX) |
X410c M7, X210c M7, C220 M7, C240 M7 |
New |
|
TDX Secure Arbitration Mode (SEAM) Loader |
X410c M7, X210c M7, C220 M7, C240 M7 |
New |
|
SHA384 PCR Bank |
X410c M7, X210c M7, C220 M7, C240 M7 |
New |
|
QpiLinkSpeed |
X410c M7, X210c M7, C220 M7, C240 M7 |
Changed |
|
C1 Auto demotion |
X410c M7, X210c M7, C220 M7, C240 M7 |
Changed |
|
C1 Auto UnDemotion |
X410c M7, X210c M7, C220 M7, C240 M7 |
Changed |
For more information on BIOS tokens, see Cisco UCS Server BIOS Tokens in Intersight Managed Mode.
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