Power and Performance
The following table lists the power and performance BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
Name |
Description |
Supported Attributes |
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Versions |
Platforms |
Values |
Dependencies |
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Optimized Power Mode |
Automatically varies processor speed and power usage based on processor utilization to increase performance per watt. Most effective under moderate utilization. |
4.3(2) and later |
C220 M7, C240 M7, X210c M7, X410c M7 |
Disabled, Enabled
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C1 Auto Demotion |
If enabled, CPU automatically demotes to C1 based on un-core auto-demote information. |
4.0(2) and later |
C220 M6, C240 M6, B200 M6, X210c M6, C220 M7, C240 M7, X210c M7, X410c M7 |
Disabled, Enabled, Auto
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C1 Auto UnDemotion |
Select whether to enable processors to automatically undemote from C1. |
4.0(2) and later |
C220 M6, C240 M6, B200 M6, X210c M6, C220 M7, C240 M7, X210c M7, X410c M7 |
Disabled, Enabled, Auto
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Core Performance Boost |
Whether the AMD processor increases its frequency on some cores when it is idle or not being used much |
4.0(2) and later |
C125 M5, C225 M6, C245 M6, C225 M8, C245 M8, X215c M8 |
Disabled, Auto
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Global C State Control |
Whether the AMD processors control IO-based C-state generation and DF C-states. |
4.0(2) and later |
C125 M5, C225 M6, C245 M6, C225 M8, C245 M8, X215c M8 |
Auto, Disabled, Enabled
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Ln Stream HW Prefetcher, where n value is 1 and 2. |
Whether the processor allows the AMD hardware prefetcher to speculatively fetch streams of data and instruction from memory into the L1 or L2 cache when necessary. |
4.0(2) and later |
C125 M5, C225 M6, C245 M6, C225 M8, C245 M8, X215c M8 |
Auto, Disabled, Enabled
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Determinism Slider |
Allows AMD processors to determine how to operate. |
4.0(2) and later |
C125 M5, C225 M6, C245 M6,C225 M8, C245 M8, X215c M8 |
Auto, Performance, Power
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Efficiency Mode Enable |
Allows you to configure power consumption based on efficiency. |
4.0(2) and later |
C225 M6, C245 M6 |
Auto, Enabled
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CPPC |
Allows you to configure Collaborative Processor Performance Control. |
4.0(2) and later |
C225 M6, C245 M6, C225 M8, C245 M8, X215c M8 |
Auto, Disabled, Enabled
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Enhanced CPU Performance |
Enhances CPU performance by adjusting server settings automatically. |
4.0(2) and later |
C220 M6, C240 M6, B200 M6, X210c M6, C220 M7, C240 M7, X210c M7, X410c M7, C245 M8, X215c M8, C240 M8, X210c M8 |
Disabled, Auto
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The server should meet the following requirements in order to use this functionality:
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LLC Dead Line |
In CPU non-inclusive cache scheme, Mid-Level Cache (MLC) evictions are filled into the Last-Level Cache (LLC). When lines are evicted from the MLC, the core can flag them as dead (not likely to be read again). The LLC has the option to drop dead lines and not fill them in the LLC. |
4.0(2) and later |
C220 M6, C240 M6, B200 M6, X210c M6, C220 M7, C240 M7, X210c M7, X410c M7, C220 M8, C240 M8, X210c M8 |
Disabled, Enabled, Auto
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UPI Link Enablement |
Enables the number of Ultra Path Interconnect (UPI) links required by the processor. |
4.0(2) and later |
C220 M6, C240 M6, B200 M6, X210c M6, C220 M7, C240 M7, X210c M7, X410c M7, C220 M8, C240 M8, X210c M8 |
Auto, 1, 2, 3 |
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UPI Power Manangement |
The UPI power management can be used for conserving power on the server. |
4.0(2) and later |
C220 M6, C240 M6, B200 M6, X210c M6, C220 M7, C240 M7, X210c M7, X410c M7, C220 M8, C240 M8, X210c M8 |
Disabled, Enabled
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XPT Remote Prefetch |
This feature allows an LLC request to be duplicated and sent to an appropriate memory controller in a remote machine based on the recent LLC history to reduce latency. |
4.0(2) and later |
C220 M6, C240 M6, B200 M6, X210c M6, C220 M7, C240 M7, X210c M7, X410c M7, C220 M8, C240 M8, X210c M8 |
Disabled, Enabled
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Latency Optimized Mode |
A set of BIOS settings that prioritize low latency and consistent performance over energy efficiency or other optimizations. |
4.3(6a) |
C220 M8, C240 M8, X210c M8 |
Disabled, Enabled
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