June 26, 2008

NOTICE:

THIS FIELD NOTICE IS PROVIDED ON AN "AS IS" BASIS AND DOES NOT IMPLY ANY KIND OF GUARANTEE OR WARRANTY, INCLUDING THE WARRANTY OF MERCHANTABILITY. YOUR USE OF THE INFORMATION ON THE FIELD NOTICE OR MATERIALS LINKED FROM THE FIELD NOTICE IS AT YOUR OWN RISK. CISCO RESERVES THE RIGHT TO CHANGE OR UPDATE THIS FIELD NOTICE AT ANY TIME.

Revision History

Revision	Date	Comment
1.0	26-JUN-2008	Initial Public Release

Products Affected

Products Affected
SPA-IPSEC-SSC400-2

Problem Description

While booting or reloading, the SSC-400 could crash and fail to boot. If the device boots up successfully, no card functionality is affected.

Background

While the SSC-400 boots, the LODI FPGA on the IPSEC SPA is in charge of using the appropriate clock signal to generate an EFC lock. Clock signal degradation may occur between the internal VPN SPA clock and the LODI upon boot up. In this event, the software will crash by design, once signal degradation is detected.

Problem Symptoms

There is a chance that the SSC-400 will crash during bootup. If the device boots properly, there are no implications to normal functionality of the IPSEC SPA and SSC-400.

Workaround/Solution

The software of the device needs to be upgraded to one of the following or later:

12.2(32.08.45)SR, 12.2(32.08.11)SX46, 12.2(18.07.14)SXF, 12.2(32.08.46)SRB, 12.2(33)SRB, 12.2(33)SRA03, 12.2(18)SXF08, 12.2(18)ZY01, 12.2(33)SXH

Once that is complete, the user can choose to return to prior versions of installed software for compliance reasons. The LODI will have been upgraded and it is completely backward compatable. An RMA is not required to address and resolve the signal degredation issue.

DDTS

To follow the bug ID link below and see detailed bug information, you must be a registered customer and you must be logged in.

DDTS	Description
CSCek65022 (registered customers only)	Integrated into: 12.2(32.08.45)SR 12.2(32.08.11)SX46 12.2(18.07.14)SXF 12.2(32.08.46)SRB 12.2(33)SRB 12.2(33)SRA03 12.2(18)SXF08 12.2(18)ZY01 12.2(33)SXH

How To Identify Hardware Levels

Old Version of the LODI:

cisco#sho hw-module slot fpd
==== ====================== ====== =============================================
H/W Field Programmable Current Min. Required
Slot Card Type Ver. Device: "ID-Name" Version Version
==== ====================== ====== ================== =========== ==============
9 7600-SSC-400 2.0 1-I/O FPGA 1.0 1.0
2-DP RX FPGA 1.1 1.1
3-DP TX FPGA 1.3 1.3
4-ROMMON 1.3 1.3
---- ---------------------- ------ ------------------ ----------- --------------
9/0 SPA-IPSEC-2G 1.0 1-PROM 1.1 1.1
2-LODI FPGA 1.21 1.21.
3-SEQUOIA FPGA 1.1 1.1
---- ---------------------- ------ ------------------ ----------- --------------
9/1 SPA-IPSEC-2G 1.0 1-PROM 1.1 1.1
2-LODI FPGA 1.21 1.21
3-SEQUOIA FPGA 1.1 1.1
==== ====================== ====== =============================================

New Version of the LODI:

cisco#sho hw-module slot fpd
==== ====================== ====== =============================================
H/W Field Programmable Current Min. Required
Slot Card Type Ver. Device: "ID-Name" Version Version
==== ====================== ====== ================== =========== ==============
9 7600-SSC-400 2.0 1-I/O FPGA 1.0 1.0
2-DP RX FPGA 1.1 1.1
3-DP TX FPGA 1.3 1.3
4-ROMMON 1.3 1.3
---- ---------------------- ------ ------------------ ----------- --------------
9/0 SPA-IPSEC-2G 1.0 1-PROM 1.1 1.1
2-LODI FPGA 1.23 1.23
3-SEQUOIA FPGA 1.1 1.1
---- ---------------------- ------ ------------------ ----------- --------------
9/1 SPA-IPSEC-2G 1.0 1-PROM 1.1 1.1
2-LODI FPGA 1.23 1.23
3-SEQUOIA FPGA 1.1 1.1
==== ====================== ====== =============================================

For More Information

If you require further assistance, or if you have any further questions regarding this field notice, please contact the Cisco Systems Technical Assistance Center (TAC) by one of the following methods:

• Open a service request on Cisco.com
• By email
• By telephone

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