The Cisco Nexus® SmartNIC+ V9P is an FPGA-based network application card, optimized for low latency and high density.
The device packs a powerful 16nm Xilinx Virtex UltraScale Plus (VU9P) FPGAs with 2.5M logic cells, into a compact, half-height, half-length, PCIe 16x form factor.
An extensive memory hierarchy for complex, memory-intensive applications
The Xilinx VU9P FPGA (Field Programmable Gate Array) features 75Mbit of block RAM and 270Mbit of UltraRAM on chip. The Cisco Nexus SmartNIC+ V9P further incorporates an additional 9GB of DDR4 DRAM on the board for high throughput access. The DRAM is accessible via a 72-bit-wide bus for maximum performance.
Dual QSFP-DD ports provide up to 400Gbps of full duplex connectivity.
The dual QSFP-DD ports offer high-speed 4x40GbE or 2x200GbE connectivity. Using QSFP-DD breakout cables expands the connectivity to 16x10GbE/25GbE4 connections. This high-density connectivity enables a range of high-performance, directly connected network applications, bypassing the need for traditional switching and multiplexing requirements.
Cisco is a specialist in low-latency, high-performance FPGA IP cores.
We provide you the same high-speed, low-latency IP blocks used in our market leading products, including:
● 10GbE PCS/MAC with ultra-low-latency performance
● Low-latency, high-throughput PCIe DMA engine
● Timing, signaling, and register interfaces, including I2C
● Packet field extractor and frame multiplexer (with source code)
● Asynchronous FIFO and CDC modules (with source code)
Several example designs are also provided to help get design work started and completed quickly.
A standard Linux driver as well as transparent TCP and UDP acceleration and low-level packet access.
The Cisco Nexus SmartNIC+ V9P functions out of the box as a high-performance network adapter. The entire SmartNIC software library is available, including the ExaSOCK sockets application acceleration system and the libexanic direct user-space access API. Libexanic provides easy support for low-latency packet TX/RX, managing the FPGA state (through register access), and low-latency TCP/UDP delegated sending of operations for hybrid hardware/software applications. The Cisco Nexus SmartNIC+ V9P also supports fast and easy firmware updates (without requiring reboots) and vital statistics monitoring (temperatures, light levels, etc.).
Cisco Nexus SmartNIC+ V9P
16nm Xilinx Virtex UltraScale+ FPGA:
● 2.5M System Logic Cells, 2.3M CLBs
● 2Mb total block RAM
● 270Mb UltraRAM
● 32x 32.75Gb/s I/O transceivers (16 connected to QSFP-DDs, 16 connected to PCIe)
● 72-bit interface, up to 2666MHz
● 161MHz crystal
● 10MHz temperature compensated crystal
● 10MHz – 750Hz programmable (I2C) crystal
● PPS in/out via MCX connector, 3.3V CMOS, selectable 50ohm termination
● 8x 1.8V CMOS GPIO via header
● 2x bi-color port LEDs
● 12V external supply (GPU adapter) for >75W designs
● Software-based PCIe flash programming utility
● USB to JTAG port
● JTAG header onboard (auto select)
● 1Gbit onboard flash
PCS/MAC (TX + RX)2:
● 6.2ns (min) @ 10Gbps,
● 1Gbps/100Mbps also supported
● Packet trigger, 34ns (min)2
● Full loopback, 50ns (min)
Software latency (raw frame, ½RTT)1:
● 64 bytes – 816ns
● 256 bytes – 1027ns
● Low-profile PCI Express Card
● 168x69mm (6.6x2.7in)
● PCIe x16 Gen 3 @ 8.0 GT/s per lane
● 200GbE, 100GbE, 50GbE, 40GbE, 25GbE, 10GbE, 1GbE, 100M Fast Ethernet
● Fiber (100GBASE-SR4, 100GBASE-LR4, 40GBASE-SR4, 40GBASE-LR4), QSFP/28 Direct Attach breakout
Note: Suitable forced air cooling is required to operate this product.
Information about Cisco’s environmental sustainability policies and initiatives for our products, solutions, operations, and extended operations or supply chain is provided in the “Environment Sustainability” section of Cisco’s Corporate Social Responsibility (CSR) Report.
Reference links to information about key environmental sustainability topics (mentioned in the “Environment Sustainability” section of the CSR Report) are provided in the following table:
Information on product material content laws and regulations
Information on electronic waste laws and regulations, including products, batteries, and packaging
Cisco makes the packaging data available for informational purposes only. It may not reflect the most current legal developments, and Cisco does not represent, warrant, or guarantee that it is complete, accurate, or up to date. This information is subject to change without notice.
Flexible payment solutions to help you achieve your objectives
Cisco Capital® makes it easier to get the right technology to achieve your objectives, enable business transformation and help you stay competitive. We can help you reduce the total cost of ownership, conserve capital, and accelerate growth. In more than 100 countries, our flexible payment solutions can help you acquire hardware, software, services and complementary third-party equipment in easy, predictable payments. Learn more.