Updated May 22, 2006
August 04, 2004
NOTICE:
THIS FIELD NOTICE IS PROVIDED ON AN "AS IS" BASIS AND DOES NOT IMPLY ANY KIND OF GUARANTEE OR WARRANTY, INCLUDING THE WARRANTY OF MERCHANTABILITY. YOUR USE OF THE INFORMATION ON THE FIELD NOTICE OR MATERIALS LINKED FROM THE FIELD NOTICE IS AT YOUR OWN RISK. CISCO RESERVES THE RIGHT TO CHANGE OR UPDATE THIS FIELD NOTICE AT ANY TIME.
Products Affected
| Product | Top Assembly | Printed Circuit Assembly | Comments |
| Products affected | Part # | Part # | |
| ESR-PRE2 | 800-08916-09 | 73-5544-09 | This Field Notice covers any PRE-2 with an RP2 board that has an assembly part number of 73-5544-09 and does not have deviation 72991 installed. |
Problem Description
| All 800-08916-09 PRE2 assemblies have a marginal timing condition that can result in a variety of memory corruption errors. The primary symptom of the marginal timing condition is a multi-bit ECC error in Main Memory. |
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Background |
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The PRE-2 underwent engineer failure analysis (EFA) on return material authorizations (RMAs) from customers experiencing abnormal failure rates. Root Cause indicated a timing margin control circuit upgrade was required on all PRE-2 assemblies due to slow system controller devices. Cisco originally believed that only a select number of these assemblies, identified by serial number, were susceptible to the issue. It has since been discovered, with newer software images that have enhanced features and scalability, that the down rev 800-08916-09 PRE-2 is more susceptible to failures than previously thought. Upgraded units (version -12 or higher) have shipped since mid April 2004 and are not affected. |
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Problem Symptom |
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Single and multi bit ECC errors in main memory. System crashes. Incomplete crash files. Unexplained Bus Errors. MULTI BIT ECC ERROR INDICATION is the most usual symptom. The only failure mode that has been proven to be a clear indicator of a the hardware issue is the multi bit ECC error symptom. The ECC information registers near the bottom of the crashinfo indicate whether a multi bit ECC error has occurred. The lower two bits of the ecc_err_address register indicate whether the ECC error was single or multi bit. An "01" indicates a single bit error, a "10" indicates a multi bit error. In the ECC information example below, the 0xA (1010) in (b/s 0x00011C9A) indicates that this was a multi bit error because the lower two bits are "10". ECC information : ecc_err_address : 0x9A1C0100 (b/s 0x00011C9A) ecc_err_data_high : 0x00000000 (b/s 0x00000000) ecc_err_data_low : 0x25104100 (b/s 0x00411025) ecc_bytes_from_mem : 0x00000000 (b/s 0x00000000) ecc_calculation : 0x99000000 (b/s 0x00000099) Single bit ECC count : 0 |
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Workaround/Solution |
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Workaround: There is no customer workaround for this issue. Solution: Affected PRE2-09 boards were returnable under an Umpire Upgrade Program. The program is now expired after a one year extension. Should an eligible rev -09 board be still in service it can be returned under a standard RMA (fix-on-fail). |
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How to Identify Hardware Levels |
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This Field Notice covers any PRE-2 with an RP2 board that has an assembly part number of 73-5544-09 and does NOT have deviation 72991 installed.
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For More Information
If you require further assistance, or if you have any further questions regarding this field notice, please contact the Cisco Systems Technical Assistance Center (TAC) by one of the following methods:
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