Cisco - Channelized T3 Processors

Channelized T3 Processors

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Cisco Systems' new channelized digital signal level 3 (DS-3) interface processor (CT3IP) for Cisco 7500 and 7000/Route Switch Processor (RSP) series routers delivers the next level of scalability in wide-area networking. The CT3IP aggregates 28 DS-1 ports into a single DS-3, offers onboard testing and troubleshooting, and delivers full line rate and fractional DS-1 support across all DS-1 channels. With this functionality, the CT3IP offers the highest level of integration and functionality in the industry.

General Features T3 Features T1 Features

-Standards-compliant DS-3 interface with built-in DSX-3 line interface unit
-Built-in M31 demultiplexing and four front-panel accessible T1 channels
-Built-in T1 data service units (DSUs) enabling T1 breakout ports to connect directly to Cisco MIP cards for demultiplexing down to DS-0 channels
-Full online insertion and removal (OIR) support, enabling users to remove, add, or replace interface processors on line
-M23 or C-bit parity
-Maintenance data link (MDL)
-B3ZS encoding
-DS-3 alarm/event detection (alarm indication signal) [AIS], out of frame [OOF], far-end block error [FEBE], line code violation [LCV], excessive zeros [EXZ]
-Bit/byte oriented codes for C-bit parity
-Per-T1 BER testing
-Super Frame (SF) and Extended Superframe Format (ESF) framing
-FDL
-Fractional T1 support for N x 64 Kbps (all T1 channels) and N x 56 Kbps (last 8 T1 channels)