Revised April 24, 2007
September 11, 1999
THIS FIELD NOTICE IS PROVIDED ON AN "AS IS" BASIS AND DOES NOT IMPLY ANY KIND OF GUARANTEE OR WARRANTY, INCLUDING THE WARRANTY OF MERCHANTABILITY. YOUR USE OF THE INFORMATION ON THE FIELD NOTICE OR MATERIALS LINKED FROM THE FIELD NOTICE IS AT YOUR OWN RISK. CISCO RESERVES THE RIGHT TO CHANGE OR UPDATE THIS FIELD NOTICE AT ANY TIME.
This field notice affects the following products:
Powering up a Catalyst 8540 and booting with two RPs or installing a secondary route processor in a running system causes the secondary RP to fail to boot. An error message on the console of the secondary route processor will be output.
This defect was determined to occur about 1% of the time. This defect has Cisco bug ID CSCdm87966.
There is a signal called SYNC that is generated by each RP (CPU). This signal is critical to operation of the system. In a redundant configuration, the secondary RP needs to synchronize its SYNC signal to the SYNC signal of the primary RP. If it cannot do this, problems will arise if the RPs switch over. This condition is detected by the software when the secondary RP boots and initializes. The following message is output on the console port of the secondary RP:
SECONDARY CPU: *** Failure - Can not sync to other CPUs sync **** Sys Clock lock and sync failed.
A defect was found in the field-programmable gate array (FPGA) of the RP that causes this behavior about 1% of the time when the system is power cycled or the secondary RP is inserted and removed online (OIR).
In addition to the error message explained above, the secondary RP fails to boot and the switch router is in a non-redundant mode. This occurs when the Catalyst 8540 Campus Switch Router (CSR) or MSR switch router has two RPs and the secondary RP has an FPGA image version of 4.5 or lower.
The workarounds for this issue are to power cycle the switch router or OIR the secondary RP.
Use the Cisco IOS reprogram command to upgrade the RP FPGA image to 4.6. This image is available to customers in CCO's Software Center for both the Catalyst 8540 CSR and MSR in the FPGA images section. The image is the same for both products (CSR and MSR) and can be downloaded from either page.
For More Information
If you require further assistance, or if you have any further questions regarding this field notice, please contact the Cisco Systems Technical Assistance Center (TAC) by one of the following methods:
Receive Email Notification For New Field Notices
Product Alert Tool - Set up a profile to receive email updates about reliability, safety, network security, and end-of-sale issues for the Cisco products you specify.