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Circuit Emulation Services (CES)

T1 Unstructured CES with SRTS Clocking and Soft PVCs

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Document ID: 6334


Contents

Introduction
Prerequisites
      Requirements
      Components Used
      Conventions
Assumptions
Configure
      Network Diagram
      Configurations
Verify
Troubleshoot
Related Information

Introduction

This document provides a sample configuration of T1 Unstructured Circuit Emulation Service (CES) with Synchronous Residual Time Stamp (SRTS) Clocking and Soft PVCs. Unstructured service means that both SRTS and PVCs utilizes the entire T1/E1 bandwidth. The ATM switch does not look into the T1/E1, but simply reproduces a stream of bits with clocking from the recipient port to the target port. This example uses SRTS for clocking. In this asynchronous clocking method, SRTS measures the difference between the service clock (received on the CBR interface) and the network-wide reference clock. This difference is the Residual Time Stamp (RTS). Refer to An Introduction to Circuit Emulation Services for a more detailed explanation on SRTS.

Prerequisites

Requirements

There are no specific requirements for this document.

Components Used

This document is not restricted to specific software and hardware versions.

The information in this document was created from the devices in a specific lab environment. All of the devices used in this document started with a cleared (default) configuration. If your network is live, make sure that you understand the potential impact of any command.

Conventions

Refer to Cisco Technical Tips Conventions for more information on document conventions.

Assumptions

The sample configurations in this document are based on these assumptions:

  • This example uses SRTS clocking mode. Clocking information sent in the ATM cell is called SRTS. The SRTS value is specified using four bits and is sent per eight cells using one bit in the AAL1 header for every odd sequence numbered cell.

  • With SRTS, both ATM switches must be in sync and use the same reference clock. In this configuration, the Cisco LightStream LS1010 derives clocking from the CBR interface, and the Cisco 8540 MSR ATM switch derives the same clock over the ATM network.

  • Framing on both PBXs is Extended Superframe (ESF). This is the default on the LS1010 so it does not need to be explicitly configured. However, it is configured in this example for the sake of demonstration.

  • The line-code on both PBXs is binary 8-zero substitution (B8ZS). This is the default on the LS1010 so it does not need to be explicitly configured. However, it is configured in this example for the sake of demonstration.

  • The LS1010 is the active side of the soft PVC; the 8540-MSR is the passive side.

  • The distance between the PBX and the ATM switch is less than 110 feet on the CES Port Adaptor Module (PAM). This length is the default line build-out (lbo), so it does not need to be explicitly configured. However, it is configured in this example for the sake of demonstration.

  • The LS1010 is equipped with a Feature Card Per-Flow Queueing (FC-PFQ), which uses a phase lock loop (PLL) capable of locking onto and tracking the selected the clock source. This high quality, locked clock is then fed to the network clock interfaces in order to provide interface timing. The 8540 MSR is equipped with a Network Clock Module (NetClkMod), which offers the added advantage of a Stratum 3 clock source.

  • The ATM Pseudo interfaces (ATM-Px/y/z) is created when the circuit is defined. Refer to Configuring Circuit Circuit Emulation Services for more details.

Configure

In this section, you are presented with the information to configure the features described in this document.

Note: Use the Command Lookup Tool (registered customers only) to find more information on the commands used in this document.

Network Diagram

This document uses this network setup:

cessample3_1.gif

Configurations

This document uses these configurations:

  • 8540-MSR Configuration

  • LS1010-A Configuration

8540-MSR

 
8540-MSR#show running-config
Building configuration...
Current configuration:
!
version 12.0
no service pad
service timestamps debug datetime msec
service timestamps log datetime msec
no service password-encryption
service internal
!
hostname 8540-MSR
!
network-clock-select 1 atm 3/0/0
!
boot system flash bootflash:cat8540m-wp-mz.120-1a.W5.7.bin
logging buffered 4096 debugging
!
redundancy
 main-cpu  
  no sync config startup
  sync config running
facility-alarm core-temperature major 53
facility-alarm core-temperature minor 45ip subnet-zero
atm address 47.0091.8100.0000.0090.2144.8401.0090.2144.8401.00
atm router pnni
 no aesa embedded-number left-justified
 node 1 level 56 lowest
  redistribute atm-static
!
interface ATM3/0/0
no ip address
no ip directed-broadcast
!
interface ATM3/0/1
no ip address no
ip directed-broadcast
!
interface CBR3/1/0
no ip address no
ip directed-broadcast
ces aal1 clock srts
ces circuit 0 circuit-name example
ces dsx1 linecode b8zs
ces dsx1 framing esf
ces dsx1 lbo 0_110
!
interface ATM0
no ip address
no ip directed-broadcast
atm maxvp-number 0
!
interface Ethernet0
no ip directed-broadcast
!
line con 0
transport input none
line aux 0
line vty 0 4
login
!
end

Issue the show ces address on the passive side of the soft PVC in order to get the address and VPI/VCI pair that you need to configure the active side of the soft PVC (the LS1010 in this example).

Refer to this sample output:


8540-MSR#show ces address
CES-IWF ATM Address(es):47.0091.8100.0000.0090.2144.8401.4000.0c81.9030.10 
CBR3/1/0:0 vpi 0 vci 16

LS1010-A

 
ls1010#show running-config
Building configuration...
Current configuration:
!
version 11.3
no service pad
service timestamps debug datetime msec
service timestamps log datetime msec
no service password-encryption
service internal
!
hostname ls1010
!
!
network-clock-select 1 CBR12/1/0
!
atm address 47.0091.8100.0000.0090.92b8.6401.0090.92b8.6401.00
atm router pnni
no aesa embedded-number left-justified
node 1 level 56 lowest
redistribute atm-static
!
!
no ip address
!
interface CBR12/1/0
no ip address
ces aal1 clock srts
ces circuit 0 circuit-name example
ces dsx1 linecode b8zs
ces dsx1 framing esf
ces dsx1 lbo 0_110
ces pvc 0 dest-address 
47.0091.8100.0000.0090.2144.8401.4000.0c81.9030.10 vpi 0 vci 16
!
interface CBR12/1/1
no ip address
!
interface CBR12/1/2
no ip address
!
interface CBR12/1/3
no ip address
!
interface ATM13/0/0
no ip address
atm maxvp-number 0
!
interface Ethernet13/0/0
ip classless
!
line con 0
line aux 0
line vty 0 4
login
!
end

Verify

Use this section to confirm that your configuration works properly.

The Output Interpreter Tool (registered customers only) (OIT) supports certain show commands. Use the OIT to view an analysis of show command output.

Issue the show ces interface command in order to verify that the CES circuits are up on both sides.

Refer to this sample output:

ls1010#show ces interface cbr 12/1/0
Interface: CBR12/1/0 Port-type:T1-DCU
IF Status: UP Admin Status: UP 
Channels in use on this port: 1-24
LineType: ESF LineCoding: B8ZS LoopConfig: NoLoop
SignalMode: NoSignalling XmtClockSrc: network-derived
DataFormat: UnStructured AAL1 Clocking Mode: SRTS LineLength: 0_110
LineState: NoAlarm
Errors in the Current Interval:
PCVs 514 LCVs 2 ESs 0 SESs 1 SEFSs 0
UASs 0 CSSs 0 LESs 0 BESs 0 DMs 0
Errors in the last 24Hrs:
PCVs 2057 LCVs 10 ESs 0 SESs 4 SEFSs 0
UASs 19 CSSs 0 LESs 0 BESs 0 DMs 0
Input Counters: 1054405 cells, 49557035 bytes
Output Counters: 1054405 cells, 49557035 bytes

Issue the show atm vc command in order to verify that the soft PVC is established between the two ATM switches.

Refer to this sample output:

8540-MSR#show atm vc interface ATM-P3/1/3
Interface    VPI   VCI   Type    X-Interface   X-VPI    X-VCI     Encap Status
ATM-P3/1/3    0    16   SoftVC      ATM3/0/0      0       39             UP 
ls1010#show atm vc interface ATM-P12/1/3
Interface    VPI   VCI   Type  X-Interface     X-VPI     X-VCI      Encap Status
ATM-P12/1/3   0    16   SoftVC     ATM12/0/0      0       39             UP

In order to verify that there are no clocking slips, issue the sh ces circuit cbr x/y/z 0 command and see if the underflows or overflows increase. Make sure to issue this command on the 8540-MSR side as well.

Refer to this sample output:

ls1010#show ces circuit cbr 12/1/0 0
Circuit: Name sil, Circuit-state ADMIN_UP / Interface CBR12/1/0,
Circuit_id 0, Port-Type T1, Port-State UP
Port Clocking network-derived, aal1 Clocking Method CESIWF_AAL1_CLOCK_SRTS
Channel in use on this port: 1-24
Channels used by this circuit: 1-24
Cell-Rate: 4107, Bit-Rate 1544000
cas OFF, cell_header 0x100 (vci = 16)
Configured CDV 2000 usecs, Measured CDV 373 usecs
De-jitter: UnderFlow 1, OverFlow 0
ErrTolerance 8, idleCircuitdetect OFF, onHookIdleCode 0x0
state: VcActive, maxQueueDepth 823, startDequeueDepth 435
Partial Fill: 47, Structured Data Transfer 0
Active SoftVC 
Src: atm addr 47.0091.8100.0000.0090.92b8.6401.4000.0c86.1030.10 vpi 0, vci 16
Dst: atm addr 47.0091.8100.0000.0090.2144.8401.4000.0c81.9030.10

Troubleshoot

There is currently no specific troubleshooting information available for this configuration.

Related Information

Updated: Aug 13, 2006 Document ID: 6334