Product Overview
The Cisco® I-Flex design combines shared port adapters (SPAs) and SPA interface processors (SIPs), taking advantage of an extensible design that facilitates service prioritization for voice, video, and data (triple-play) services. Enterprise and service provider customers can take advantage of improved slot economics resulting from modular port adapters that are interchangeable across Cisco routing platforms. The I-Flex design maximizes connectivity options and offers superior service intelligence through programmable interface processors that deliver line-rate performance. Cisco I-Flex enhances speed-to-service revenue and provides a rich set of quality-of-service (QoS) features for premium service delivery while effectively reducing the overall cost of ownership.
This data sheet contains specifications for the Cisco ASR 1000 Series Shared Port Adapter Interface Processor (SIP) supported on the Cisco ASR 1000 Series Aggregated Services Router platform, which consists of three different chassis, the Cisco ASR 1002 Router, the Cisco ASR 1004 Router, and the Cisco ASR 1006 Router. The SIP is built into the ASR1002 chassis and supported as a modular component on the Cisco ASR1004 and Cisco ASR1006 chassis. At the time of first availability of the Cisco ASR 1000 Series, the first-generation SIP (ASR1000-SIP10) supports up to 10-Gbps throughout.
Figure 1. Cisco ASR 1000 Series SIP

The Cisco ASR 1000 Series SIP helps enable high-performance, intelligent wide- and metropolitan-area network (WAN and MAN) services. Enterprises and service providers can take full advantage of the scalability and performance it offers, along with many options for WAN aggregation and connectivity that the SPA portfolio offers. The Cisco ASR 1000 Series SIP provides the physical termination for the SPAs and accepts up to four half-height and 2 full height Cisco SPAs, supporting Ethernet, ATM, Packet over SONET/SDH (PoS), and Serial interfaces.
With the Cisco ASR 1000 platform built on a centralized forwarding architecture, the SIP does not participate in forwarding decisions but rather provide ingress classification and buffering capabilities before sending traffic over to ASR 1000 Embedded Services Processor (ESP) for packet processing. Once traffic arrives on the ESP, the Cisco Packet Processor (CPP) residing on the ESP provides further ingress and egress hierarchical QoS processing. The SIP has built in network clock circuitry to receive and distribute clocking information between the Route Process (RP) and the Shared Port Adaptors (SPAs). The modular software architecture of the ASR 1000 Series allows SPAs installed on the SIP to be upgraded individually without affecting the operations of the remaining SPAs installed in the same SIP or the same chassis.
Features and Benefits
Table 1. Cisco ASR 1000 Series Enterprise Applications
Product Specifications
Table 2 provides the product specifications of the Cisco ASR 1000 Series SIP:
Table 2. ASR 1000 Series: SIP-10 Specifications
System Requirements
Table 3 gives system requirements of the Cisco ASR 1000 Series SIP.
Table 3. System Requirements
|
System Requirements |
|
|
Hardware |
• Cisco ASR 1004
• Cisco ASR 1006
|
|
Software |
Cisco IOS XE Operating System |
Ordering Information
To place an order, visit the Cisco Ordering Home Page and refer to Table 4. To download software, visit the Cisco Software Center.
Table 4. Ordering Information
|
Product Name |
Product Number |
|
Cisco ASR 1000 Series SPA Interface Processor 10G |
ASR-1000-SIP10 |
|
Cisco ASR 1000 Series SPA Interface Processor 10G, spare |
ASR-1000-SIP10= |
For More Information
For more information about the Cisco ASR 1000 Series SIP, visit: http://www.cisco.com/go/asr1000 or contact your local Cisco account representative.
For more information about the Cisco SPA/SIP portfolio, visit: http://www.cisco.com/go/spa or contact your local Cisco account representative.
