NPE-175 and NPE-225 Overview
This chapter describes the network processing engine (NPE) models NPE-175 and NPE-225 and contains the following sections:
•Supported Platforms
•Software Requirements
•NPE-175 and NPE-225 Description and Overview
•NPE-175 and NPE-225 Memory Information
Supported Platforms
The following NPEs support the Cisco 7200 series routers and Cisco 7200 VXR routers:
•NPE-175
•NPE-225
The following NPEs support the Cisco uBR7246VXR universal broadband router, Cisco uBR7246, and Cisco uBR7223 universal broadband routers:
•NPE-175
•NPE-225
Software Requirements
For minimum software release information, see the "Software Requirements" section on page 8-4.
NPE-175 and NPE-225 Description and Overview
This section contains information about the network processing engine components and the system management functions. The network processing engine maintains and executes the system management functions for the Cisco 7200 series and Cisco uBR7200 series routers. The NPE also shares the system memory and environmental monitoring functions with the I/O controller.
Components
Figure 2-1 NPE-175
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Network controller board |
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Handle |
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System controller |
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Midplane connectors |
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Processor engine board |
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Boot ROM (U1) |
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Captive installation screw |
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Temperature sensor |
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RM5270 microprocessor |
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SDRAM DIMM (U15) |
Figure 2-2 NPE-225
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Network controller board |
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Handle |
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System controller |
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Midplane connectors |
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Processor engine board |
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Boot ROM (U1) |
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Captive installation screw |
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Temperature sensor |
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RM5271 microprocessor |
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SDRAM DIMM (U15) |
The NPE-175 and NPE-225 consist of the following components:
•Reduced instruction set computing (RISC) microprocessor
–The NPE-175 has an RM5270 microprocessor that operates at an internal clock speed of 200 MHz.
–The NPE-225 has an RM5271 microprocessor that operates at an internal clock speed of 262 MHz.
•System controller
The system controller provides hardware logic to interconnect the processor, DRAM, and the PCI-based system backplane bus. The NPE-175 and NPE-225 have one system controller that provides processor access to the two midplane and single I/O controller peripheral component interconnect (PCI) buses. The system controller also allows port adapters—on either of the two midplane PCI buses—access to SDRAM.
•Upgradable memory modules
The NPE-175 and NPE-225 use SDRAM for providing code, data, and packet storage.
•Cache memory
The NPE-175 and NPE-225 have unified cache SRAM that functions as the secondary cache for the microprocessor. (The primary cache is within the microprocessor.)
•Two environmental sensors for monitoring the cooling air as it leaves the chassis
•Boot ROM for storing sufficient code for booting the Cisco IOS software; the NPE-175 and NPE-225 have boot ROM
Note Neither the NPE-175 nor the NPE-225 has packet SRAM.
System Management Functions
The network processing engines perform the following system management functions:
•Sending and receiving routing protocol updates
•Managing tables, caches, and buffers
•Monitoring interface and environmental status
•Providing Simple Network Management Protocol (SNMP) management through the console and Telnet interface
•Accounting for and switching of data traffic
•Booting and reloading images
•Managing port adapters (including recognition and initialization during online insertion and removal)
Terms and Acronyms
•Cache—Memory with fast access and small capacity used to temporarily store recently accessed data; found either incorporated into the processor or near it.
•DIMM—dual in-line memory module
•DRAM—dynamic random-access memory
•Instruction and data cache—Instructions to the processor, and data on which the instructions work.
•Integrated cache—Cache that is built into the processor; sometimes referred to as internal cache. Cache memory physically located outside the processor is not integrated, and is sometimes referred to as external cache.
•OTP—one time programmable
•Primary, secondary, tertiary cache—Hierarchical cache memory storage based on the proximity of the cache to the core of the processor. Primary cache is closest to the processor core and has the fastest access. Secondary cache has slower access than primary cache, but faster access than tertiary cache.
•RAM—random-access memory
•RISC—reduced instruction set computing
•ROM—read-only memory
•SIMM—single in-line memory module
•SDRAM—synchronous dynamic random-access memory
•SDRAM-fixed—SDRAM of a fixed size or quantity; can be replaced, but not upgraded
•SODIMM—small outline dual in-line memory module
•SRAM—static random-access memory
•Unified cache— Instruction cache and data cache are combined. For example, a processor may have primary cache with separate instruction and data cache memory, but unified secondary cache.
NPE-175 and NPE-225 Memory Information
To determine the memory configuration of your NPE, use the show version command.
The following example shows an NPE-225 installed in a Cisco 7206VXR router:
router(boot)# show version
Cisco Internetwork Operating System Software
IOS (tm) 7200 Software (C7200-BOOT-M), Released Version 12.0(19990124:222541)
[biff-nightly 115]
Copyright (c) 1986-1999 by cisco Systems, Inc.
Compiled Mon 15-Feb-99 21:50 by biff
Image text-base:0x600088F8, data-base:0x6064C000
cisco 7206VXR (NPE225) processor with 57344K/8192K bytes of memory.
R527x CPU at 262Mhz, Implementation 40, Rev 10.0, 2048KB L2 Cache
6 slot VXR midplane, Version 2.0
Table 2-1 provides memory specifications, Table 2-2 provides memory configurations for the NPE-175, and Table 2-3 provides memory configurations for the NPE-225.
Table 2-1 NPE-175 and NPE-225 Memory Specifications
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Component Location on the NPE-175 and NPE-225 Board
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SDRAM |
64 or 128 MB |
1 configurable bank with 1 SDRAM slot |
DIMM |
U15 |
Boot ROM |
512 KB |
1 |
OTP ROM for the ROM monitor program |
U1 |
Primary cache |
16 KB (instruction), 16 KB (data) |
— |
RM5270 processor, primary internal cache |
U4 |
|
32 KB (instruction), 32 KB (data) |
— |
RM5271 processor, primary internal cache |
U4 |
Secondary cache |
2 MB |
4 x 256 x 18 bits = 64 bit plus 4 parity bits |
RM527x processor, unified external cache |
U5, U6, U7, U81 |
Table 2-2 NPE-175 SDRAM DIMM Configurations—Configurable Memory Only
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|
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64 MB |
U15 |
1 64-MB DIMM |
MEM-SD-NPE-64MB |
128 MB |
U15 |
1 128-MB DIMM |
MEM-SD-NPE-128MB |
Table 2-3 NPE-225 SDRAM DIMM Configurations—Configurable Memory Only
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|
|
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64 MB |
U15 |
1 64-MB DIMM |
MEM-SD-NPE-64MB |
128 MB |
U15 |
1 128-MB DIMM |
MEM-SD-NPE-128MB |
256 MB |
U15 |
1 256-MB DIMM |
MEM-SD-NSE-256MB |