IP to ATM Class of Service (CoS) refers to a set of features that are
enabled on a per-virtual circuit (VC) basis. Given this definition, IP to ATM
CoS is not supported on the ATM Interface Processor (AIP), PA-A1 or 4500 ATM
network processors. This ATM hardware does not support per-VC queueing as the
PA-A3 and most network modules (other than the ATM-25) define it.
This document clarifies Quality of Service (QoS) support on the AIP,
PA-A1, and 4x00 ATM network processors.
Note: Traditional Cisco IOS® priority queueing
and custom queueing cannot be used as a workaround for the PA-A1 and the AIP.
Other than some support for custom queueing on the 4x00 network processors, no
ATM interface of any Cisco IOS-based router has ever supported priority or
Note: The ATM-25 network module for Cisco 2600 and 3600 Series Routers does
not support IP to ATM CoS. You can configure shaped variable bit rate (VBR)
PVCs for QoS at the ATM layer.
There are no specific requirements for this document.
Technical Tips Conventions for more information on document
The AIP supports eight VC queues. In order to configure more VCs forces
two or more VCs to share the same queue. No QoS mechanisms are available for
the AIP. Cisco recommends that you migrate to newer ATM hardware such as the
PA-A3 in order to take advantage of the current set of Cisco IOS QoS features.
Note: Note: Cisco no longer supports QoS on non-VIP interface processors on
7500 Series Routers. Instead, VIP-based QoS, which runs as a distributed
service on the versatile interface processor (VIP), is supported and provides
superior performance and latency. The service policy
command has been removed from the command-line interface (CLI) for non-VIP
interface processors. This issue is documented under Cisco Bug ID
IP to ATM CoS queueing mechanisms begin to take effect only when the VC
is congested. Since the PA-A1 supports only UBR VCs at the line rate of 155
Mbps, backpressure by the ATM interface driver to queue the excess packets in
the layer-three IOS queues applies only when the interface is congested. When
the ATM driver signals that the interface queues are congested, the system
processor slows the rate at which it sends packets to the driver. The effect in
the case of the PA-A1 is reduced throughput. Thus, although the PA-A1 is
supported by VIP-based queueing on 7500 series platforms, Cisco does not
recommend this. Note that a service policy which configures VIP-based queueing
is supported on the main interface only in Cisco IOS Software Release 12.2. It
is not supported on a subinterface or a PVC due to the architecture of the
The PA-A1 can reach a condition of congestion while it runs below the
line rate. Congestion can occur while PA-A1 runs below the line rate. Every
router interface maintains a FIFO transmit ring, which is a special structure
used to control which buffers are used to receive and transmit packets to the
physical media. Refer to
and Tuning the tx-ring-limit Value. The IP to ATM CoS queueing
mechanism's definition of congestion is to fill the transmit ring. Thus, when
the transmit ring fills, the interface driver exerts the backpressure signal
needed by the QoS features to take affect and act on the queued packets. In
other words, the PA-A1 supports per-interface backpressure and can be seen by
the layer-3 queueing system as a single fat pipe, just like a packet over SONET
(POS) or a HSSI interface.
In addition, the PA-A1 supports other QoS mechanisms on a main
interface. These mechanisms include class-based marking and per-interface
weighted random early detection (WRED). The PA-A1 also supports Multiprotocol
Label Switching (MPLS) CoS. Refer to
Class of Service (CoS).
Note: When used in a Cisco 7500 Series Router, a PA-A1 supports VIP-based
fair queueing (DWFQ), but the CLI accepts the
fair-queue command on the interface and appears to
enable RSP-based WFQ, even though RSP-based WFQ is not supported by this port
adapter. As a workaround, enable distributed Cisco Express Forwarding (DCEF)
with the ip cef distributed command and then enable
fair-queue under the interface to enable DWFQ. This
is documented under Cisco Bug ID CSCdu71489.
ATM network processors for 4x00 Series Routers support four rate-based
queues and offer some VC queueing isolation. Isolation refers to efforts by the
microcode to ensure fair allocation of packet buffers on a per-VC basis when
the buffers fill. The objective is to limit the effect of a congested VC on a
non-congested VC since the ability to achieve a certain transmission rate
depends on the ability to queue a sufficient number of packets that equal the
bits-per-second transmission rate. Previously, traditional priority queueing
(as configured with the priority-list command),
custom queueing (as configured with the queue-list
command), and WFQ were configurable on ATM network processors but
functionally did not support configurations with more than one VC on an