The following example shows an output of the show controllers serial command on a Cisco ASR 1000 Series Router with a 2-Port Clear-Channel T3/E3 SPA installed in slot 2:
Router# show controllers serial 2/2/0
Serial2/2/0 - (SPA-2XT3/E3) is up
Current mode is T3
Framing is c-bit, Clock Source is Line
Bandwidth limit is 44210, DSU mode 0, Cable length is 10 feet
rx FEBE since last clear counter 0, since reset 0
Data in current interval (820 seconds elapsed):
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation
0 P-bit Err Secs, 0 P-bit Sev Err Secs
0 Sev Err Framing Secs, 0 Unavailable Secs
0 Line Errored Secs, 0 C-bit Errored Secs, 0 C-bit Sev Err Secs
0 Severely Errored Line Secs
0 Far-End Errored Secs, 0 Far-End Severely Errored Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 0 Far-end path failures
0 Far-end code violations, 0 FERF Defect Secs
0 AIS Defect Secs, 0 LOS Defect Secs
Data in Interval 1:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation
0 P-bit Err Secs, 0 P-bit Sev Err Secs
0 Sev Err Framing Secs, 0 Unavailable Secs
The following example shows an output of the show controllers serial command on a Cisco ASR 1000 Series Router with a 2-Port Clear-Channel T3/E3 SPA installed in slot 2:
Router# show controllers serial 2/2/0
Serial1/0/1 - (SPA-8XT3/E3) is up
Current mode is T3
Framing is c-bit, Clock Source is Line
Bandwidth limit is 44210, DSU mode 0, Cable length is 10 feet
rx FEBE since last clear counter 0, since reset 0
Tabular MIB:
INTERVAL LCV PCV CCV PES PSES SEFS UAS LES CES CSES
01:30-01:36 0 0 0 0 0 0 0 0 14 14
01:15-01:30 1 0 0 0 0 0 1 1 0 0
Total 1 0 0 0 0 0 1 1 0 0
No alarms detected.
No FEAC code is being received
MDL transmission is disabled
The following example shows an output of the show controllers command on a Cisco ASR 1000 Series Router with an 8-Port Channelized T1/E1 SPA installed in slot 0:
Router# show controllers e1 0/3/0 brief
E1 0/3/0 is up.
Applique type is SPA-8XCHT1/E1
No alarms detected.
alarm-trigger is not set
Framing is crc4, Line Code is HDB3, Clock Source is Line.
Data in current interval (571 seconds elapsed):
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
Total Data (last 24 hours)
0 Line Code Violations, 0 Path Code Violations,
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
The following example shows an output of the show controllers command on a Cisco ASR 1000 Series Router with a 4-Port Channelized T3 SPA installed in slot 2:
Router# show controllers t3
T3 2/0/0 is up.
Hardware is SPA-2XCT3/DS0
IO FPGA version: 2.7, HDLC Framer version: 0
T3/T1 Framer(1) version: 2
SUBRATE FPGA version: 1.4
HDLC controller available FIFO buffers 4084
Applique type is Channelized T3/T1
No alarms detected.
MDL transmission is disabled
FEAC code received: No code is being received
Framing is C-BIT Parity, Line Code is B3ZS, Cablelength is 224
Clock Source is Internal
Equipment customer loopback
Data in current interval (204 seconds elapsed):
2 Line Code Violations, 6 P-bit Coding Violation
0 C-bit Coding Violation, 1 P-bit Err Secs
1 P-bit Severely Err Secs, 1 Severely Err Framing Secs
0 Unavailable Secs, 1 Line Errored Secs
1 C-bit Errored Secs, 1 C-bit Severely Errored Secs
0 Severely Errored Line Secs
0 Far-End Errored Secs, 0 Far-End Severely Errored Secs
11 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 1 Far-end path failures
0 Far-end code violations, 10 FERF Defect Secs
0 AIS Defect Secs, 0 LOS Defect Secs
T1 1 is down
timeslots: 1-24
FDL per AT&T 54016 spec.
Transmitter is sending LOF Indication.
Receiver is getting AIS.
Framing is ESF, Clock Source is Internal
Data in current interval (202 seconds elapsed):
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
9 Unavail Secs, 0 Stuffed Secs
5 Near-end path failures, 0 Far-end path failures, 0 SEF/AIS Secs
T1 2
Not configured.
T1 3
Not configured.
The following example shows an output of the show controllers sonet command on a Cisco ASR 1000 Series Aggregation Services Router with a 1-Port Channelized STM-1/OC-3 SPA installed in slot
1:
Router# show controllers sonet 1/0/0
SONET 1/0/0 is up.
Hardware is SPA-1XCHSTM1/OC3
IO FPGA version: 1.7, HDLC Framer version: 0
T3/T1 Framer(1) version: 1
Sonet/SDH Framer version: 0
SUBRATE FPGA version: 1.4
HDLC controller available FIFO buffers 3760
Applique type is Channelized Sonet/SDH
Clock Source is Line
Medium info:
Type: Sonet, Line Coding: NRZ,
SECTION:
LOS = 0 LOF = 0 BIP(B1) = 85
SONET/SDH Section Tables
INTERVAL CV ES SES SEFS
23:15-23:20 0 0 0 0
23:00-23:15 0 0 0 0
22:45-23:00 85 1 1 0
Total of Data in Current and Previous Intervals
22:45-23:20 85 1 1 0
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