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This chapter provides an overview of the release history, and feature and Management Information Base (MIB) support for the Packet over SONET (POS) SPAs on the Cisco 12000 series router.
This chapter includes the following sections:
•Displaying the SPA Hardware Type
Packet-over-SONET is a high-speed method of transporting IP traffic between two points. This technology combines the Point-to-Point Protocol (PPP) with Synchronous Optical Network (SONET) and Synchronous Digital Hierarchy (SDH) interfaces.
SONET is an octet-synchronous multiplex scheme defined by the American National Standards Institute (ANSI) standard (T1.1051988) for optical digital transmission at hierarchical rates from 51.840 Mbps to 2.5 Gbps (Synchronous Transport Signal, STS-1 to STS-48) and greater. SDH is an equivalent international standard for optical digital transmission at hierarchical rates from 155.520 Mbps (Synchronous Transfer Mode-1 [STM-1]) to 2.5 Gbps (STM-16) and greater.
SONET specifications have been defined for single-mode fiber and multimode fiber. The POS SPAs on the Cisco 12000 series router allow transmission over both single-mode and multimode fiber at various optical carrier rates. The multirate SPAs (such as the 2-Port OC-3c/STM-1 and OC-12c/STM-4 POS SPA) support use of OC-3c and OC-12c SFPs.
SONET/SDH transmission rates are integral multiples of 51.840 Mbps. The following transmission multiples are currently specified and used on the POS SPAs on the Cisco 12000 series router:
•OC-3c/STM-1—155.520 Mbps
•OC-12c/STM-4—622.080 Mbps
•OC-48—2.488 Gbps
•OC-192c/STM-64—9.953 Gbps
The POS specification (RFC 1619) describes the use of PPP encapsulation over SONET/SDH links. Because SONET/SDH is, by definition, a point-to-point circuit, PPP is well-suited for use over these links. PPP treats SONET/SDH transport as octet-oriented full-duplex synchronous links. PPP presents an octet interface to the physical layer. The octet stream is mapped into the SONET/SDH Synchronous Payload Envelope (SPE), with the octet boundaries aligned with the SPE octet boundaries. The PPP frames are located by row within the SPE payload. Because frames are variable in length, the frames are allowed to cross SPE boundaries.
This section provides a list of some of the primary features supported by the POS SPA hardware and software:
•Jumbo frames (up to 9216 bytes)
•Internal buffering to support short bursts of data traffic at the bus interface
•HDLC and PPP encapsulation—All POS SPAs
•Cisco Frame Relay and RFC 2427 Frame Relay encapsulation
•Online insertion and removal (OIR) from the SIP, or OIR of the SIP with the SPA inserted
•Small form-factor pluggable (XFP) optics module OIR for the 1-Port OC-192c/STM-64 POS/RPR XFP SPA and SFP optics module OIR for the 2-Port OC-48c/STM-16 POS SPA, 2-Port, 4-Port, and 8-Port OC-3c/STM-1 and OC-12c/STM-4 POS SPAs, and 4-Port and 8-Port OC-3c/STM-1 POS SPAs
•Multirate functionality on 2-Port, 4-Port, and 8-Port OC-3c/STM-1 and OC-12c/STM-4 POS SPAs with support of OC-3c and OC-12c SFPs.
•Field-programmable gate array (FPGA) upgrade support
The POS SPAs also support the following groups of features:
•SONET/SDH Compliance Features
•SONET/SDH Error, Alarm, and Performance Monitoring Features
•SONET/SDH Synchronization Features
This section lists the SONET/SDH compliance features supported by the POS SPAs on the Cisco 12000 series router:
•1+1 SONET Automatic Protection Switching (APS) as per G.783 Annex A
•1+1 SDH Multiplex Section Protection (MSP) as per G.783 Annex A
•American National Standards Institute (ANSI) T1.105
•ITU-T G.707, G.783, G.957, G.958
•Telcordia GR-253-CORE: SONET Transport Systems: Common Generic Criteria
•Telcordia GR-1244: Clocks for the Synchronized Network: Common Generic Criteria
This section lists the SONET/SDH error, alarm, and performance monitoring features supported by the POS SPAs on the Cisco 12000 series router:
•Signal failure bit error rate (SF-BER)
•Signal degrade bit error rate (SD-BER)
•Signal label payload construction (C2)
•Path trace byte (J1)
•Section:
–Loss of signal (LOS)
–Loss of frame (LOF)
–Error counts for B1
–Threshold crossing alarms (TCA) for B1
•Line:
–Line alarm indication signal (LAIS)
–Line remote defect indication (LRDI)
–Line remote error indication (LREI)
–Error counts for B2
–Threshold crossing alarms (TCA) for B2
•Path:
–Path alarm indication signal (PAIS)
–Path remote defect indication (PRDI)
–Path remote error indication (PREI)
–Error counts for B3
–Threshold crossing alarms (TCA) for B3
–Loss of pointer (LOP)
–New pointer events (NEWPTR)
–Positive stuffing event (PSE)
–Negative stuffing event (NSE)
This section lists the SONET/SDH synchronization features supported by the POS SPAs on the Cisco 12000 series router:
•Local (internal) timing (for inter-router connections over dark fiber or Wavelength Division Multiplex [WDM] equipment)
•Loop (line) timing (for connecting to SONET/SDH equipment)
•+/- 20 ppm clock accuracy over full operating temperature
This section lists the WAN protocols supported by the POS SPAs on the Cisco 12000 series router:
•RFC 1661, The Point-to-Point Protocol (PPP)
•RFC 1662, PPP in HDLC framing
•RFC 2615, PPP over SONET/SDH (with 1+x43 self-synchronous payload scrambling)
•RFC 3518, Point-to-Point Protocol (PPP) Bridging Control Protocol (BCP)
•Cisco Protect Group Protocol over UDP/IP (Port 1972) for APS and MSP
•Multiprotocol Label Switching (MPLS)
This section lists the network management features supported by the POS SPAs on the Cisco 12000 series router:
•Simple Network Management Protocol (SNMP) Management Information Base (MIB) counters
•Local (diagnostic) loopback
•Network loopback
•NetFlow Data Export
•IP over the Section Data Communications Channel (SDCC)
•RFC 3592 performance statistics for timed intervals (current, 15-minute, multiple 15-minute, and 1-day intervals):
–Regenerator section
–Multiplex section
–Path errored seconds
–Severely errored seconds
–Severely errored framed seconds
Table 14-1 provides information about POS feature compatibility and restrictions by SIP and SPA combination.
The following MIBs are supported for POS SPAs on the Cisco 12000 series router:
•CISCO-APS-MIB
•CISCO-ENTITY-EXT-MIB
•CISCO-ENTITY-FRU-CONTROL-MIB
•CISCO-OPTICAL-MONITORING-MIB
•CISCO-SRP-MIB—Beginning in Cisco IOS Release 12.0(32)SY for supported SPAs.
•ENTITY-MIB
•IF-MIB (RFC 2233, The Interface Group MIB using SMIv2)
•OLD-CISCO-CHASSIS-MIB
•SONET-MIB (RFC 3592, Definitions of Managed Objects for the SONET/SDH Interface Type)
To locate and download MIBs for selected platforms, Cisco IOS releases, and feature sets, use Cisco MIB Locator found at the following URL:
http://tools.cisco.com/ITDIT/MIBS/servlet/index
If Cisco MIB Locator does not support the MIB information that you need, you can also obtain a list of supported MIBs and download MIBs from the Cisco MIBs page at the following URL:
http://www.cisco.com/public/sw-center/netmgmt/cmtk/mibs.shtml
To access Cisco MIB Locator, you must have an account on Cisco.com. If you have forgotten or lost your account information, send a blank e-mail to cco-locksmith@cisco.com. An automatic check will verify that your e-mail address is registered with Cisco.com. If the check is successful, account details with a new random password will be e-mailed to you. Qualified users can establish an account on Cisco.com by following the directions found at this URL:
Figure 14-1 identifies the primary hardware devices that are part of the POS SPA architecture. The figure shows a single optics transceiver supported by both of the POS SPAs. However, the 1-Port OC-192c/STM-64 POS/RPR SPA and 1-Port OC-192c/STM-64 POS/RPR VSR Optics SPA support fixed optics, while the 1-Port OC-192c/STM-64 POS/RPR XFP SPA supports XFP optics. The path of a packet remains the same except for where the optic transceiver support resides.
Figure 14-1 1-Port OC-192c/STM-64 POS/RPR XFP SPA Architecture
In POS mode, every incoming and outgoing packet on the OC-192 POS SPAs goes through the SONET/SDH framer and SPI4.2 interface.
The following steps describe the path of an ingress packet through the 1-Port OC-192c/STM-64 POS/RPR XFP SPA:
1. The framer receives SONET/SDH streams from the XFP optics, extracts clocking and data, and processes the section, line, and path overhead.
2. The framer extracts the POS frame payload and verifies the frame size and frame check sequence (FCS).
3. The framer passes valid frames to the System Packet Level Interface 4.2 (SPI4.2) interface on the SPA.
4. The SPI4.2 interface transfers frames to the host through the SPI4.2 bus for further processing and switching.
The following steps describe the path of an egress packet through the 1-Port OC-192c/STM-64 POS/RPR XFP SPA:
1. The host sends packets to the SPA using the SPI4.2 bus.
2. The SPA stores the data in the appropriate channel's first-in first-out (FIFO) queue.
3. The SPA passes the packet to the framer.
4. The framer accepts the data and stores it in the appropriate channel queue.
5. The framer adds the FCS and SONET/SDH overhead.
6. The framer sends the data to the XFP optics for transmission onto the network.
This section provides an overview of the architecture of the POS SPAs and describes the path of a packet in the ingress and egress directions. Some of these areas of the architecture are referenced in the SPA software and can be helpful to understand when troubleshooting or interpreting some of the SPA CLI and show command output.
Figure 14-2 identifies the primary hardware devices that are part of the POS SPA architecture. The figure shows a single optics transceiver supported by both of the POS SPAs. However, the 1-Port OC-192c/STM-64 POS/RPR SPA supports fixed optics, while the 1-Port OC-192c/STM-64 POS/RPR XFP SPA supports XFP optics. The path of a packet remains the same except for where the optic transceiver support resides.
Figure 14-2 1-Port OC-192c/STM-64 POS/RPR XFP SPA Architecture
In POS mode, every incoming and outgoing packet on the 1-Port OC-192c/STM-64 POS/RPR SPA and 1-Port OC-192c/STM-64 POS/RPR XFP SPAgoes through the SONET/SDH framer, and SPI4.2 interface.
The following steps describe the path of an ingress packet through the 1-Port OC-192c/STM-64 POS/RPR XFP SPA:
1. The framer receives SONET/SDH streams from the XFP optics, extracts clocking and data, and processes the section, line, and path overhead.
2. The framer extracts the POS frame payload and verifies the frame size and frame check sequence (FCS).
3. The framer passes valid frames to the System Packet Level Interface 4.2 (SPI4.2) interface on the SPA.
4. The SPI4.2 interface transfers frames to the host through the SPI4.2 bus for further processing and switching.
The following steps describe the path of an egress packet through the 1-Port OC-192c/STM-64 POS/RPR XFP SPA:
1. The host sends packets to the SPA using the SPI4.2 bus.
2. The SPA stores the data in the appropriate channel's first-in first-out (FIFO) queue.
3. The SPA passes the packet to the framer.
4. The framer accepts the data and stores it in the appropriate channel queue.
5. The framer adds the FCS and SONET/SDH overhead.
6. The framer sends the data to the XFP optics for transmission onto the network.
Figure 14-3 identifies the primary hardware devices that are part of the 2-Port OC-48c/STM-16 POS SPA architecture.
Figure 14-3 2-Port OC-48c/STM-16 POS SPA Architecture
The following steps describe the path of an ingress packet through the 2-Port OC-48c/STM-16 POS SPA:
1. The framer receives SONET/SDH streams from the SFP optics, extracts clocking and data, and processes the section, line, and path overhead.
2. The framer detects Loss of Signal (LOS), Loss of Frame (LOF), Severely Errored Frame (SEF), Line Alarm Indication Signal (AIS-L), Loss of Pointer (LOP), Line Remote Defect Indication Signal (Enhanced RDI-L), Path Alarm Indication Signal (AIS-P), Standard and Enhanced Path Remote Defect Indication Signal (RDI-P), Path Remote Error Indication (Enhanced REI-P). The framer extracts or inserts DCC bytes.
3. The framer processes the S1 synchronization status byte, the pointer action bytes (per Telcordia GR-253-CORE), and extracts or inserts DCC bytes.
4. The POS processor extracts the POS frame payload and verifies the frame size and frame check sequence (FCS).
5. The POS processor supports PPP, Frame Relay, or HDLC modes and optionally performs payload scrambling.
6. The POS processor passes valid frames to the System Packet Level Interface 4.2 (SPI4.2) interface on the SPA.
7. The SPI4.2 interface transfers frames to the host through the SPI4.2 bus for further processing and switching.
The following steps describe the path of an egress packet through the 2-Port OC-48c/STM-16 POS SPA:
1. The host sends packets to the SPA using the SPI4.2 bus.
2. The SPA stores the data in the appropriate SPI4 channel's first-in first-out (FIFO) queue.
3. The SPA passes the packet from the SPI4 interface to the POS processor where it is encapsulated in a POS frame and FCS is added.
4. The POS frame is sent to the SONET/SDH framer where it is placed into the SONET payload.
5. The framer adds the FCS and SONET/SDH overhead.
6. The framer sends the data to the SFP optics for transmission onto the network.
To verify the SPA hardware type that is installed in your Cisco 12000 series router, you can use the show diags command. For other hardware information, you can also use the show interfaces or show controllers commands. There are several other commands on the Cisco 12000 series router that also provide SPA hardware information. For more information about these commands, see the "Command Summary for POS SPAs" and the "SIP and SPA Commands" chapters in this guide.
Table 14-2 shows the hardware description that appears in the show command output for each type of SPA that is supported on the Cisco 12000 series router.
The following example shows output from the show interfaces command on a Cisco 12000 series router for the only interface port (0) on a 1-Port OC-192c/STM-64 POS/RPR SPA installed in subslot 1 of the SIP installed in chassis slot 1:
Router#show interfaces pos 1/1/0
POS1/1/0 is up, line protocol is up
Hardware is Packet over SONET
Internet address is 10.41.41.2/24
MTU 4470 bytes, BW 9952000 Kbit, DLY 100 usec, rely 255/255, load 1/255
Encapsulation HDLC, crc 32, loopback not set
Keepalive not set
Scramble enabled
Last input 00:00:59, output 00:00:11, output hang never
Last clearing of "show interface" counters 00:00:14
Queueing strategy: fifo
Output queue 0/40, 0 drops; input queue 0/75, 0 drops
Available Bandwidth 9582482 kilobits/sec
5 minute input rate 0 bits/sec, 0 packets/sec
5 minute output rate 0 bits/sec, 0 packets/sec
0 packets input, 0 bytes, 0 no buffer
Received 0 broadcasts, 0 runts, 0 giants, 0 throttles
0 parity
0 input errors, 0 CRC, 0 frame, 0 overrun, 0 ignored, 0 abort
1 packets output, 314 bytes, 0 underruns
0 output errors, 0 applique, 0 interface resets
0 output buffer failures, 0 output buffers swapped out
0 carrier transitions
The following example shows output from the show interfaces command on a Cisco 12000 series router for the first interface port (0) on a 2-Port OC-48c/STM-16 POS SPA installed in subslot 0 of the SIP installed in chassis slot 0:
Router# show interfaces pos3/0/0
POS3/0/0 is down, line protocol is down
Hardware is Packet over SONET
MTU 4470 bytes, BW 2488000 Kbit, DLY 100 usec, rely 255/255, load 1/255
Encapsulation HDLC, crc 32, loopback not set
Keepalive set (10 sec)
Scramble enabled
Last input never, output never, output hang never
Last clearing of "show interface" counters never
Queueing strategy: fifo
Output queue 0/40, 0 drops; input queue 0/75, 0 drops
Available Bandwidth 2395851 kilobits/sec
5 minute input rate 0 bits/sec, 0 packets/sec
5 minute output rate 0 bits/sec, 0 packets/sec
0 packets input, 0 bytes, 0 no buffer
Received 0 broadcasts, 0 runts, 0 giants, 0 throttles
0 parity
0 input errors, 0 CRC, 0 frame, 0 overrun, 0 ignored, 0 abort
0 packets output, 0 bytes, 0 underruns
0 output errors, 0 applique, 1 interface resets
0 output buffer failures, 0 output buffers swapped out
1 carrier transitions
The following example shows output from the show diags command on a Cisco 12000 series router with a 1-Port OC-192c/STM-64 POS/RPR XFP SPA located in subslot 0 of the SIP installed in chassis slot 2:
Router# show diags subslot 2/0
SUBSLOT 2/0 (SPA-OC192POS-XFP): 1-port OC192/STM64 POS/RPR XFP Optics Shared Port Adapter
Product Identifier (PID) : SPA-OC192POS-XFP
Version Identifier (VID) : V01
PCB Serial Number : PRTA1304177
Top Assy. Part Number : 68-2190-01
Top Assy. Revision : A0
Hardware Revision : 2.1
CLEI Code : UNASSIGNED
Insertion Time : 3d08h (00:18:18 ago)
Operational Status : ok
The following example shows output from the show diags command on a Cisco 12000 series router with a 2-Port OC-48c/STM-16 POS SPA located in subslot 0 of the SIP installed in chassis slot 3:
Router# show diags subslot 3/0
SUBSLOT 3/0 (SPA-2XOC48POS/RPR): 2-port OC48/STM16 POS/RPR Shared Port Adapter
Product Identifier (PID) : SPA-2XOC48-POS/RPR
Version Identifier (VID) : V01
PCB Serial Number : JAB0922079S
Top Assy. Part Number : 68-2226-01
Top Assy. Revision : 32
Hardware Revision : 1.0
CLEI Code :
Insertion Time : 00:00:37 (00:04:50 ago)
Operational Status : ok
The following example shows output from the show controllers pos command on a Cisco 12000 series router for the only interface port (0) on a 1-Port OC-192c/STM-64 POS/RPR SPA installed in subslot 1 of the SIP installed in chassis slot 1:
Router# show controllers pos 1/1/0
POS1/1/0
SECTION
LOF = 0 LOS = 0 BIP(B1) = 0
LINE
AIS = 0 RDI = 0 FEBE = 0 BIP(B2) = 0
PATH
AIS = 0 RDI = 0 FEBE = 0 BIP(B3) = 0
LOP = 0 NEWPTR = 0 PSE = 0 NSE = 0
Active Defects: None
Active Alarms: None
Alarm reporting enabled for: SF SLOS SLOF B1-TCA B2-TCA PLOP B3-TCA
Framing: SONET
APS
COAPS = 0 PSBF = 0
State: PSBF_state = False
ais_shut = FALSE
Rx(K1/K2): 00/00 S1S0 = 00, C2 = 16
Remote aps status (none); Reflected local aps status (none)
CLOCK RECOVERY
RDOOL = 0
State: RDOOL_state = False
PATH TRACE BUFFER : STABLE
Remote hostname : Test
Remote interface: POS2/0/0
Remote IP addr : 10.41.41.1
Remote Rx(K1/K2): 00/00 Tx(K1/K2): 08/00
BER thresholds: SF = 10e-3 SD = 10e-6
TCA thresholds: B1 = 10e-6 B2 = 10e-6 B3 = 10e-6