Research at Cisco

Component, Board and System Test and DFT

Project ID:



Component, Board and System Test and DFT


We are looking for innovative test methodologies that address disruptive technologies, and address current test challenges with respect to cost, quality and reliability. Proposals can cover test and design for test at the component level, board level and system level. Proposals should address the innovative aspects of the test technology, or the disruptive technology that is driving changes to existing methodologies.

Full Description:

As the scale, speed and complexity of technology increases, component, board and system test are becoming more critical to ensure product quality at reasonable costs. Disruptive technologies (such as 3D Stacked ICs and Network on Chip) are also challenging current test capabilities. Moore's Law, along with More Moore, and More than Moore have created components with very high levels of complexity with very little margin for error. All this comes at a time when manufacturing costs are being pushed lower and lower while quality expectations are moving higher and higher. While test and design for test are evolving to meet these challenges, technology continues to scale at a faster pace. One consequence of this massive technology scaling is the lack of correlation between failures in system and the component-level defects that cause these failures to occur. Quite often component suppliers cannot recreate failures that occur in the system. If they are able to recreate the failure, it's often very difficult to the defect that is causing the failure.

The demand placed on testing has grown significantly. Defects are becoming much more subtle, massive complexity increases test times, reduces yields, and increases time to market. At a system level, it is nearly impossible to localize failures down to the component level. Isolating to the block, flop, gate level is not done, resulting in a lack of correlation between failures at the system and defects on the components. Finding systemic defects which cause system failures but do not fail at ATE is usually a long, expensive and labor intensive process. There are several areas of test that are either in rapid evolution or are a consequence of rapid evolution in the technology that is being tested.

In order to address test technology requirements driven by technology scaling and innovations, we are looking for innovative research proposals in the following areas:

  • Data Driven Diagnosis
  • Adaptive Test Methods
  • Testing of 3D Stacked ICs (including 2.5D)
  • Testing of multi Gigabit per second interfaces
  • Power Issues with respect to Test
  • Component-in-system test
  • Test Process Optimization
  • Testing of Multicore SoCs
  • Testing of Network Processors
  • Functional BIST
  • Yield vs. Quality tradeoffs
  • Functional Test Optimization
  • Memory test

Proposals should high light the approaches, and planned research within this objective and areas of interest.

Constraints and other information:

Cisco expects customary scholarly dissemination of results, and hopes that promising results would be made available to the community without limiting licenses, royalties, or other encumbrances.

Proposal submission:

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RFPs may be withdrawn as research proposals are funded, or interest in the specific topic is satisfied.
Submissions are batched and reviewed at the beginning of each calendar quarter in January, April, July, and October.

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