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Cisco Catalyst 8500 Series Multiservice Switch Routers

Hardware Troubleshooting for Catalyst 8540/8510 MSRs and LightStream 1010 ATM Switch: Interface Connection Issues

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Hardware Troubleshooting for Catalyst 8540/8510 MSRs and LightStream 1010 ATM Switch: Interface Connection Issues
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    This document is part of a documentation set. Refer to the Hardware Troubleshooting for Catalyst 8540/8510 MSRs and LightStream 1010 ATM Switch Index page for the Introduction to this documentation set.

    Contents

    Introduction
    Prerequisites
          Requirements
          Components Used
          Conventions
    Troubleshooting 155-Mbps and 622-Mbps Interfaces
          Port Adapter LEDs
          Using the show controllers Command with 155-Mbps and 622-Mbps Interfaces
    Troubleshooting OC-3c, OC-12c, and OC-48c Interfaces
          Interface Module LEDs
          Using the show controllers Command with OC-3c, OC-12c, and OC-48c Interfaces
    Troubleshooting T1 and E1 Interfaces
          Interface Module LEDs
          Using the show controllers Command with T1 and E1 Interfaces
    Troubleshooting DS3 and E3 Interfaces
          Interface Module LEDs
          Using the show controllers Command with DS3 and E3 Interfaces
    Troubleshooting CES T1 and CES E1 Interfaces
          Port Adapter LEDs
          Using the show controllers Command with CES T3 and E3 Interfaces
    Troubleshooting CDS3 Frame Relay Interfaces
          Interface Module LEDs
          Using the show controllers Command with CDS3 Frame Relay Interfaces
    Cisco Support Community - Featured Conversations
    Related Information

    Introduction

    This document provides hardware troubleshooting information for 8540/8510 MSRs and LightStream 1010 ATM Switch interface connection issues.

    Note: For detailed cabling and hardware information for each interface module, refer to the ATM Port Adapter and Interface Module Installation Guide. The default configurations for the various port adapters are described in the Configuring ATM Network Interfaces.

    Prerequisites

    Requirements

    There are no specific requirements for this document.

    Components Used

    This document is not restricted to specific software and hardware versions.

    The information in this document was created from the devices in a specific lab environment. All of the devices used in this document started with a cleared (default) configuration. If your network is live, make sure that you understand the potential impact of any command.

    Conventions

    Refer to Cisco Technical Tips Conventions for more information on document conventions.

    Troubleshooting 155-Mbps and 622-Mbps Interfaces

    This section describes specific processes and commands used to troubleshoot the 155-Mbps and 622-Mbps port adapters.

    Port Adapter LEDs

    The port adapter faceplate LEDs provide status information for individual 155-Mbps and 622-Mbps single-mode and multimode fiber-optic and UTP interface connections of the port adapter. The LEDs are described in the following table.

    Note: Use the show controllers command to display the LED status.

    LED Status Description
    RX (Receive) Off Flashing green Red LOS1 or port adapter is shut down. Cells are being received. LED blinks every 5 seconds and pulse rate increases with data rate. Alarm (LOF2, LCD3, AIS4).
    TX (Transmit) Off Flashing green Flashing yellow Steady yellow No transmit line activity indication. Cells are being transmitted. LED pulse rate increases with data rate. Loopback. FERF5 alarm.

    1LOS = loss of signal

    2LOF = loss of frame

    3LCD = loss of cell delineation

    4AIS = alarm indication signal

    5FERF = far-end receive failure

    Using the show controllers Command with 155-Mbps and 622-Mbps Interfaces

    Use the following command to display the 155-Mbps and 622-Mbps interface configuration:

    show controllers atm card/subcard/port

    The show controllers atm card/subcard/port command shows the interface memory management and error counters. Use it to check memory management and error counters. 

    Switch#show controllers atm 1/0/0

IF Name: ATM1/0/0    Chip Base Address: A8A08000
Port type: OC3    Port rate: 155 Mbps    Port medium: MM Fiber
Port status:Good Signal    Loopback:None    Flags:8308
TX Led: Traffic Pattern    RX Led: Traffic Pattern  TX clock source: network-derived
  
Framing mode:  sts-3c
  
Cell payload scrambling on
  
Sts-stream scrambling on
OC3 counters:
  Key: txcell - # cells transmitted 
       rxcell - # cells received
       b1     - # section BIP-8 errors
       b2     - # line BIP-8 errors
       b3     - # path BIP-8 errors
       ocd    - # out-of-cell delineation errors - not implemented
       g1     - # path FEBE errors
       z2     - # line FEBE errors
       chcs   - # correctable HEC errors
       uhcs   - # uncorrectable HEC errors
 
<Information Deleted>
 
phy_tx_cnt:4789577, phy_rx_cnt:4704918
Switch#

    The following table lists the best troubleshooting fields in the show controllers command:

    Field Description
    Port status Should read "Good Signal."
    Loopback Should read "None."
    TX Led Off Flashing green Red LOS1 or port adapter is shut down. Cells are being received. LED blinks every 5 seconds and pulse rate increases with data rate. Alarm (LOF2, LCD, AIS4).
    RX Led Off Flashing green Flashing yellow Steady yellow No transmit line activity indication. Cells are being transmitted. LED pulse rate increases with data rate. Loopback. FERF5 alarm.
    Framing mode Should match the framing mode configuration of the destination port.
    Cell payload scrambling Should match the cell payload scrambling mode configuration of the destination port.
    Sts-Stream scrambling Should match the STS stream scrambling mode configuration of the destination port.

    1LOS = loss of signal

    2LOF = loss of frame

    3LCD = loss of cell delineation

    4AIS = alarm indication signal

    5FERF = far-end receive failure

    Use the information from the show controllers command to check the following:

    Troubleshooting OC-3c, OC-12c, and OC-48c Interfaces

    This section describes specific processes and commands used to troubleshoot the OC-3c, OC-12c, and OC-48c interface modules.

    Interface Module LEDs

    The interface module faceplate LEDs provide status information for individual single-mode and multimode fiber-optic interface connections of the interface module. The LEDs are described in the following table.

    Note: Use the show controllers command to display the LED status.

    LED Status Description
    LINK Off Green Carrier detect signal not received. Carrier detect signal received.
    RX (Receive) Off Flashing green Red LOS or interface module is shut down. Cells are being received. LED blinks every five seconds and pulse rate increases with data rate. Alarm (LOF1, OCD2, AIS3, LOP4, RDI5, LCD6, UNEQ7, PLM8).
    TX (Transmit) Off Flashing green Flashing yellow Steady yellow No transmit line activity indication. Cells are being transmitted. LED pulse rate increases with data rate. Loopback. RDI.

    1LOF = loss of frame

    2OCD = out of cell delineation

    3AIS = alarm indication signal

    4LOP = loss of pointer

    5RDI = remote defect indicator

    6LCD = loss of cell delineation (OC-48c)

    7UNEQ = unequipped code (OC-48c)

    8PLM = payload label mismatch (OC-48c)

    Using the show controllers Command with OC-3c, OC-12c, and OC-48c Interfaces

    Use the following command to display the OC-3c, OC-12c, and OC-48c interface configuration:

    show controllers atm card/subcard/port

    The show controllers atm card/subcard/port command shows the interface memory management and error counters. Use it to check memory management and error counters. 

    Switch#show controllers atm 1/0/0
IF Name: ATM1/0/0    Chip Base Address: A8A08000
Port type: OC3    Port rate: 155 Mbps    Port medium: MM Fiber
Port status:Good Signal    Loopback:None    Flags:8308
TX Led: Traffic Pattern    RX Led: Traffic Pattern  TX clock source: network-derived
  
Framing mode:  sts-3c
  
Cell payload scrambling on
  
Sts-stream scrambling on
OC3 counters:
  Key: txcell - # cells transmitted 
       rxcell - # cells received
       b1     - # section BIP-8 errors
       b2     - # line BIP-8 errors
       b3     - # path BIP-8 errors
       ocd    - # out-of-cell delineation errors - not implemented
       g1     - # path FEBE errors
       z2     - # line FEBE errors
       chcs   - # correctable HEC errors
       uhcs   - # uncorrectable HEC errors
 
<Information Deleted>
 
phy_tx_cnt:4789577, phy_rx_cnt:4704918
Switch#

    The following table lists the best troubleshooting fields in the show controllers command:

    Field Description
    Port status Good Signal Should read "Good Signal." Errors could be:
    • "SECTION LOS"
    • "SECTION LOF"
    • "LINE AIS"
    • "LINE RDI"
    • "PATH LOP" - Path Loss of Pointer.
    • "PATH AIS"
    • "PATH RDI"
    • "Invalid"
    • "OOCD" out of cell delineation
    See the following table for more information.
    Loopback Should read "None."
    TX LED Should read "Traffic Pattern." Errors could be:
    • "Steady Green"
    • "Steady Red"
    • "Steady Yellow"
    • "Traffic Pattern Flashing Green"
    • "Flashing Green""Flashing Red"
    • "Flashing Yellow"
    • "Unknown"
    See the previous Interface Module LEDs table for descriptions.
    RX LED Should read "Traffic Pattern." Errors could be:
    • "Steady Green"
    • "Steady Red"
    • "Steady Yellow"
    • "Traffic Pattern Flashing Green"
    • "Flashing Green""Flashing Red"
    • "Flashing Yellow"
    • "Unknown"
    See the previous Interface Module LEDs table for descriptions.
    TX clock source: network-derived Other choices are: Network-derived: If the interface is configured to be network-derived, the clock source specified by the network-clock-select statement is used as the transmit clock on that interface (that is, the transmit clock is derived from the source provided by the ATM switch internal clock distribution mechanism). Use the show network-clock command to find out which clock source is being used. Network-derived is the default setting on all Cisco ATM switch interfaces. Loop-timed: Transmit clock on the interface is derived from the clock source received on the same interface. This mode can be used when connecting to a device with a very accurate clock source. Free-running: Transmit clock on the interface is derived from the port adapter's local oscillator, if one exists. If the port adapter does not have a local oscillator, the oscillator from the processor board is used. In this mode, the transmit clock is not synchronized with any receive clocks in the system. This mode should be used only if synchronization is not required, like some LAN environments. For more information see the following:
    Framing mode: sts-3c SONET link uses Synchronous Transport Signal (STS). SDH uses Synchronous Transport Module STM. Refer to Understanding the Differences Between SONET and SDH in Optical Networks for more information.
    Cell payload scrambling on Sts-stream scrambling on Scrambling is designed to randomize the pattern of 1s and 0s carried in ATM cells or the physical layer frame. Randomizing the digital bits can prevent continuous, non-variable bit patterns, in other words long strings of all 1s or all 0s. Several physical layer protocols rely on transitions between 1s and 0s to maintain clocking. SONET interfaces support two levels of scrambling. The first level, sts-stream scrambling mode, is required by the ITU-T's GR-253 standard. It uses a 1 + x6 + x7 algorithm and scrambles all but the first row of the section overhead of the Sonet frame. The second level of scrambling, cell-payload scrambling, is optional and is defined in International Telecommunications Union (ITU-T) I.432, section 4.5.3. It uses a polynomial of 1 + x43. Cell-payload scrambling randomizes the bits in only the payload portion of an ATM cell and leaves the 5-byte header unscrambled. Cell-payload scrambling is designed to ensure successful ATM cell delineation, which is the process of recognizing the start of each new cell.
    txcell—# cells transmitted Indicates the number of cells transmitted.
    rxcell—# cells received Indicates the number of cells received.
    b1—# section BIP-8 errors b2—# line BIP-8 errors b3—# path BIP-8 errors Bit interleaved parity error reported. For B1, the bit interleaved parity error report is calculated by comparing the BIP-8 code with the BIP-8 code extracted from the B1 byte of the following frame. Differences indicate that section level bit errors have occurred. For B2, the bit interleaved parity error report is calculated by comparing the BIP-8/24 code with the BIP-8 code extracted from the B2 byte of the following frame. Differences indicate that line level bit errors have occurred. For B3, the bit interleaved parity error report is calculated by comparing the BIP-8 code with the BIP-8 code extracted from the B3 byte of the following frame. Differences indicate that path level bit errors have occurred.
    ocd—# out-of-cell delineation errors —not implemented Number of times that a receiving device recognizes the start and end of an ATM cell. The header error control (HEC) field of the ATM cell header is used to delineate ATM cells.
    g1—# path FEBE errors z2—# line FEBE errors Far end block errors. Line far end block error (accumulated from the M0 or M1 byte) is reported when the downstream line terminating equipment (LTE) detects BIP(B2) errors. Path far end block error (accumulated from the G1 byte) is reported when the downstream Path Terminating Equipment (PTE) detects BIP(B3) errors.
    chcs—# correctable HEC errors uhcs—# uncorrectable HEC errors Number of times that an ATM cell failed the header checksum. ATM cell headers (not payload) are protected by a 1-byte CRC called the Header Checksum (HEC or HCS). This CRC will correct single-bit errors (Correctable HCS errors) in the header and detect multiple-bit errors (Uncorrectable HCS errors). To troubleshoot this problem, determine whether the SONET layer is experiencing bit errors by looking for incrementing values of the following error counters in the output of the show controller atm command:
    • B1, B2, and B3 BIP - Indicates that the local interface is receiving SONET frames with bit parity errors.
    • FEBE - Indicates that the remote interface is receiving SONET frames with B2 and B3 errors.
    If these counters are incrementing, then the ATM cells likely will be corrupted as well. The HCS errors are simply a consequence of the SONET-level problems.

    The following table provides troubleshooting tips for possible values of the Port status field:

    Alarm Type & Severity Conditions that Cause Alarm to be Triggered Recommendation
    SLOS Section Loss of Signal Critical A SONET link must see a certain number of digital bit transitions (from 1 to 0 and 0 to 1) to ensure proper synchronization. LOS is declared when no bit transitions are detected on the incoming signal (before descrambling) for 2.3 to 100 microseconds. The LOS defect is cleared after a 125 microsecond interval (one frame) during which no LOS defect is detected.

    Note: LOS typically occurs in back-to-back lab setups because the receiver is saturated with too much light, particularly when long-reach single mode interfaces are used. Try attenuating the signal.
    1. Check the fiber optic cable to make sure it is plugged in.
    2. Verify that the local fiber optic cable is not damaged. Look for breaks or physical abnormalities.
    3. Make sure that the remote end of the fiber optic cable is connected, undamaged and that the remote port is configured properly.
    4. Try a soft loopback with the loopback internal command.
    5. Try a hard loopback by connecting the transmit to receive with a single fiber strand.
    6. Determine whether the interface is receiving too little or too much light.
    SLOF Section Loss of Frame Critical The A1 and A2 bytes in the section overhead provide frame alignment by using a particular bit pattern. A receiving interface declares LOF after detecting errors in the framing pattern for three milliseconds. LOF is cleared when two consecutive valid A1/A2 framing patterns are received.
    1. Check the fiber optic cable to make sure it is plugged in and is not damaged.
    2. Ensure the framing format on the port matches the format configured on the line.
    LAIS Alarm Indicate Signal - Line Major LAIS is sent by the section terminating equipment (STE) to alert the downstream line terminating equipment (LTE) that a LOS or LOF defect has been detected on the incoming SONET section. Upstream STE generates line AIS to downstream LTE by setting bits 6, 7, and 8 of the K2 byte to 111.
    1. Verify that the remote configuration is correct.
    2. Check the line status the remote end of the link.
    LRDI Remote Defect Indication - Line Major RDI alarms always are reported upstream from the detecting device. LRDI specifically comes back in the K2 bits 6-8 and will override any existing Automatic Protection Switching (APS) modes: (APS 1+1) or APS status (BLSR). AIS-L is also sent in bits 6-8 and is generally sent from a SONET regenerator or other STE. RDI - Line problems arise from the remote interface. Check the remote site for alarm conditions.
    PATH LOP Path Loss of Pointer Network devices report LOP when they detect a mismatch in framing types. If two router endpoints in a back-to-back lab setup are configured for different framing types, pings will succeed and neither device will declare an alarm.
    1. Verify that the remote configuration is correct.
    2. Use a WAN analyzer to capture the frames.
    PAIS Alarm Indicate Signal - Path Minor An upstream LTE that receives LAIS then sends path AIS to the downstream PTE by setting H1 and H2 bytes. The purpose is to alert the downstream PTE of a defect on the upstream LTE's incoming line signal. This is sent by a site that has received LAIS. This is a minor warning, and no action needs to be taken except to monitor the far end. If the alarms are persistent, verify the interface configurations on both ends of the trunk.
    PRDI Remote Defect Indication - Path Minor Path Remote Defect Indicator (PRDI) is used only at the path level. A problem at the path layer prompts PAIS to be sent downstream and PRDI to be sent back upstream to let the traffic provider know that there is a problem with their circuit down stream. A PRDI alarm usually indicates a problem two sites away. If the alarm is persistent, check the alarm status of neighboring sites, beginning with the nearest neighbor.
    OOCD Out of cell delineation Minor This occurrence begins the alarm integration period. (OOCD occurs when seven consecutive cells do not contain a valid header error check (HEC). OOCD clears when six consecutive HEC-valid cells are detected.) Confirm the framing configuration at each end. Use the atm framing command to configure and experiment with other framing types.

    Use the information from the show controllers command to check the following:

    Troubleshooting T1 and E1 Interfaces

    This section describes specific processes and commands used to troubleshoot the T1 and E1 interface modules.

    Interface Module LEDs

    The port adapter faceplate LEDs provide status information for individual T1 and E1 coaxial and UTP interface connections of the port adapter. The LEDs are described in the following table.

    Note: Use the show controllers command to display the LED status.

    LED Status Description
    RX (Receive) Off Flashing green Red LOS1 or port adapter is shut down. Cells are being received. LED blinks every five seconds and pulse rate increases with data rate. Alarm (LOF2, LCD3, AIS4).
    TX (Transmit) Off Flashing green Flashing yellow Steady yellow No transmit line activity indication. Cells are being transmitted. LED pulse rate increases with data rate. Loopback. FERF5 alarm.

    1LOS = loss of signal

    2LOF = loss of frame

    3LCD = loss of cell delineation

    4AIS = alarm indication signal

    5FERF = far-end receive failure

    Using the show controllers Command with T1 and E1 Interfaces

    Use the following command to display the T1 and E1 interface configuration:

    show controllers atm card/subcard/port

    The show controllers atm card/subcard/port command shows the interface memory management and error counters. Use it to check memory management and error counters. 

    Switch#show controllers atm 0/1/0

IF Name: ATM0/1/0, SUNI PDH Chip Base Address: A8908000
IF Name: ATM0/1/0, framer Base Address: A8909000
Port type: T1    Port rate: 1.5 Mbps    Port medium: UTP
  
Port status:Good signal Loopback:None    Flags:8000
 showdow clk reg value AA
  
TX Led: Traffic Pattern    RX Led: Traffic Pattern   CD Led: off
TX clock source:  network-derived
T1 Framing Mode:  ESF PLCP format
FERF on AIS is on
FERF on LCD is on (n/a in PLCP mode)
FERF on RED is on
FERF on OOF is on
FERF on LOS is on
LBO: between 0-110
Counters:
  Key: txcell   - # cells transmitted
       rxcell   - # cells received
       lcv      - # line code violations
       ferr     - # framing bit error event counter
       bee      - # bit error event, CRC-6 in ESF, Framing bit error in SF
       b1       - # PLCP BIP errors
       fe       - # PLCP framing pattern octet errors
       plcp_febe- # PLCP FEBE errors
       hcs      - # uncorrectable HEC errors
       uicell   - # unassigned/idle cells dropped
<Information Deleted>
Dump of internal registers for mask
 9 9 9 9 1 1 0 0
Switch#

    The following table lists the best troubleshooting fields in the show controllers command:

    Field Description
    lcv (line code violations) Number of bipolar violation (BPV) or excessive zeros (EXZ) errors. The conditions under which this error increments will vary with the line coding. Bipolar violation:
    • AMI - Receiving two successive pulses of the same polarity.
    • B8ZS - Receiving two successive pulses of the same polarity, but these pulses are not part of zero substitution.
    • Excessive zeros: AMI - Receiving more than 15 contiguous zeros.
    • B8ZS - Receiving more than seven contiguous zeros.
    ferr (framing bit error event): counter Number of times that an incorrect pattern for the framing bits was detected.
    b1: PLCP BIP errors When mapping ATM cells into the T1 frame, you can use physical layer convergence protocol (PLCP). PLCP consists of subframes normally represented in technical documentation as a two-dimensional grid of rows and columns of cells and overhead bytes. The ATM cells are in predetermined locations within each PLCP row, so no additional method is needed to delineate ATM cells.
    plcp_febe: PLCP FEBE errors The DS-3 M-frame uses P bits to check the line's parity. The M-subframe uses C bits in a format called C-bit parity, which copies the result of the P bits at the source and checks the result at the destination. An ATM interface reports detected C-bit parity errors back to the source via a far-end block error (FEBE).
    hcs: uncorrectable HEC errors Number of times that an ATM cell failed the header checksum. ATM cell headers (not payload) are protected by a 1-byte CRC called the Header Checksum (HEC or HCS). This CRC will correct single-bit errors (Correctable HCS errors) in the header and detect multiple-bit errors (Uncorrectable HCS errors). To troubleshoot this problem, determine whether the SONET layer is experiencing bit errors by looking for incrementing values of the following error counters in the output of the show controller atm command:
    • B1, B2, and B3 BIP - Indicates that the local interface is receiving SONET frames with bit parity errors.
    • FEBE - Indicates that the remote interface is receiving SONET frames with B2 and B3 errors.
    If these counters are incrementing, then the ATM cells likely will be corrupted as well. The HCS errors are simply a consequence of the SONET-level problems.
    uicell: unassigned/idle cells dropped The International Telecommunications Union (ITU-T) defines the format of unassigned and idle cells in its I.361 Recommendation. The purpose of these cells is to ensure proper cell decoupling or cell delineation, which enables a receiving ATM interface to recognize the start of each new cell. The ITU-T defines cell delineation mechanisms in its I.432 Recommendation. With SONET/SDH interfaces, ATM Forum standards require that an ATM device send either idle cells or unassigned cells, and the selected cell format varies with the configured framing.

    Use the information from the show controllers command to check the following:

    Troubleshooting DS3 and E3 Interfaces

    This section describes specific processes and commands used to troubleshoot the DS3 and E3 port adapters.

    Interface Module LEDs

    The interface module faceplate LEDs provide status information for individual DS3 and E3 coaxial interface connections of the interface module. The LEDs are described in the following table.

    Note:  Use the show controllers command to display the LED status.

    LED Status Description
    RX (Receive) Off Flashing green Red LOS1 or port adapter is shut down. Cells are being received. LED blinks every five seconds and pulse rate increases with data rate. Alarm (LOF2, LCD3, AIS4).
    TX (Transmit) Off Flashing green Flashing yellow Steady yellow No transmit line activity indication. Cells are being transmitted. LED pulse rate increases with data rate. Loopback. FERF5 alarm.

    1LOS = loss of signal

    2LOF = loss of frame

    3LCD = loss of cell delineation

    4AIS = alarm indication signal

    5FERF = far-end receive failure

    Using the show controllers Command with DS3 and E3 Interfaces

    Use the following command to display the DS3 and E3 interface configuration:

    show controllers atm card/subcard/port

    The show controllers atm card/subcard/port command shows the interface memory management and error counters. Use it to check memory management and error counters. 

    Switch#show controllers atm 0/1/0

IF Name: ATM0/1/0, Chip Base Address: A8908000
Port type: DS3    Port rate: 45 Mbps    Port medium: Coax
  
Port status:Good Signal Loopback:None    Flags:8000
  
TX Led: Traffic Pattern    RX Led: Traffic Pattern  TX clock source:  network-de
rived
DS3 Framing Mode:  cbit adm
FERF on AIS is on
FERF on LCD is on (n/a in PLCP mode)
FERF on RED is on
FERF on OOF is on
FERF on LOS is on
LBO: <= 225'
PDH counters:
  Key: txcell   - # cells transmitted
       rxcell   - # cells received
       lcv      - # line code violations
       ferr     - DS3: # F-bit/M-bit errors; E3: # framing errors
       exzs_ier - T3: # excessive zeros; E3 G.832: # iec errors
       perr     - DS3: # P-bit errors; E3 G.832: # BIP-8 errors
       cperr    - DS3: # path parity errors
       febe     - DS3 or E3 G.832: # FEBE errors
       b1       - # PLCP BIP errors
       fe       - # PLCP framing pattern octet errors
       plcp_febe- # PLCP FEBE errors
       hcs      - # uncorrectable HEC errors
       uicell   - # unassigned/idle cells dropped
 
<Information Deleted>
 
Netclock Reg1 Shadow:55, Netclock Reg2 Shadow:1,
Interrupt Status:DF, ASP ClkSel:C7FF
Switch#

    The following table lists the best troubleshooting fields in the show controllers command:

    Facility Statistic Description
    Line Code Violation (LCV) Number of bipolar violation (BPV) or excessive zeros (EXZ) errors. The conditions under which this error increments will vary with the line coding.
    • Bipolar violation:
      • AMI - Receiving two successive pulses of the same polarity.
      • B3ZS or HDB3 - Receiving two successive pulses of the same polarity, but these pulses are not part of zero substitution.
    • Excessive zeros:
      • AMI - Receiving more than 15 contiguous zeros.
      • B3ZS - Receiving more than seven contiguous zeros
    Framing Bit Error (BE) Number of times that an incorrect pattern for the F1 - F4 framing bits was detected.
    Summed Excessive Zeros (EZD) Number of times that an excessive number of adjacent binary zeros was detected. Excessive is defined as greater than three zeros for B3ZS and greater than four zeros for HDB3.
    Parity Error (PE) Number of parity errors detected via the P-bit on DS-3 links and via the BIP-8 field on E3 links (G.832). RFC1407 defines a P-bit parity error event as the occurrence of a received P-bit code on the DS-3 M-frame that is not identical to the corresponding locally-calculated code. Parity checks detect changes to a frame during transmission. Digital links need to retain the true value of a frame to ensure that the destination correctly interprets the transmitted information.
    Far-End Block Error (FEBE) The DS-3 M-frame uses P bits to check the line's parity. The M-subframe uses C bits in a format called C-bit parity, which copies the result of the P bits at the source and checks the result at the destination. An ATM interface reports detected C-bit parity errors back to the source via a far-end block error (FEBE).
    Rx Cell HCS Error (HCSE) ATM interfaces protect against changes to the cell header with a header error checksum (HCS) field. The HCS detects errors only in the header and not in the 48-byte payload. HCS errors indicate that source, destination or ATM network corrupted the cell header in some way.

    Use the information from the show controllers command to check the following:

    Troubleshooting CES T1 and CES E1 Interfaces

    This section describes specific processes and commands used to troubleshoot T1 and E1 circuit emulation service (CES) port adapters.

    Port Adapter LEDs

    The port adapter faceplate LEDs provide status information for individual CES T1, CES E1 UTP and coaxial interface connections of the port adapter. The LEDs are described in the following table.

    LED Status Description
    RX (Receive) Off Flashing green Red LOS1 or port adapter is shut down. Cells are being received. LED blinks every five seconds and pulse rate increases with data rate. Alarm (LOF2, LCD3, AIS4).
    TX (Transmit) Off Flashing green Flashing yellow Steady yellow No transmit line activity indication. Cells are being transmitted. LED pulse rate increases with data rate. Loopback. FERF5 alarm.

    1LOS = loss of signal

    2LOF = loss of frame

    3LCD = loss of cell delineation

    4AIS = alarm indication signal

    5FERF = far-end receive failure

    Using the show controllers Command with CES T3 and E3 Interfaces

    Use the following command to display the CES T3 and CES E3 interface configuration:

    show controllers atm card/subcard/port

    The show controllers atm card/subcard/port command shows the interface memory management and error counters. Use it to check memory management and error counters. 

    Switch#show controllers e1 4/0/1 
E1 4/0/1 is down.
 PAM state is Up
  FPGA Version:  fi-c8510-4e1fr.A.3.2
  Firmware Version: fi-c8510-4e1fr.A.2.3
  Transmitter is sending LOF Indication (RAI).
  Receiver has loss of signal.
  Framing is crc4, Line Code is HDB3, Clock Source is line.
  Data in current interval (347 seconds elapsed):
     0 Line Code Violations, 0 Path Code Violations
     0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
     0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
     347 Unavail Secs
  Data in Interval 1:
     0 Line Code Violations, 0 Path Code Violations
     0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
     0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
     900 Unavail Secs
  Data in Interval 2:

  [information Deleted]

  Total Data (last 95 15 minute intervals):
     2 Line Code Violations,0 Path Code Violations,
     0 Slip Secs, 0 Fr Loss Secs, 2 Line Err Secs, 0 Degraded Mins,
     0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
     4721390 Unavail Secs, 0 Stuffed Secs
Switch#

    The following table lists the best troubleshooting fields in the show controllers command:

    Field Description
    E1 is up Shows that the E1 controller 0 is operating. The controller's state can be up, down, or administratively down. Loopback conditions are shown as locally looped or remotely looped.
    Applique Type Shows the hardware applique type and indicates whether it is balanced or unbalanced.
    Framing Shows the current framing type. The default framing for E1 is cyclic redundancy check 4 (CRC4).
    Line Code Shows the current line code. The default line coding for E1 is HDB3.
    No alarms detected Any alarms detected by the controller are displayed here. The possible alarms are:
    • Transmitter is sending remote alarm.
    • Transmitter is sending alarm indication signal (AIS).
    • Receiver has loss of signal.
    • Receiver is getting AIS.
    • Receiver has loss of frame.
    • Receiver has remote alarm.
    • Receiver has no alarms.
    Data in current interval (251 seconds elapsed) Shows the current accumulation period, which rolls into a 24-hour accumulation every 15 minutes. The accumulation period is from one to 900 seconds. The oldest 15-minute period falls off the back of the 24-hour accumulation buffer.
    Line Code Violations Indicates the occurrence of either a Bipolar Violation (BPV) or Excessive Zeros (EXZ) error event.
    Path Code Violations Indicates a frame synchronization bit error in the D4 and E1-no CRC formats or a CRC error in the Extended Superframe (ESF) and E1-CRC formats.
    Slip secs Indicates the replication or deletion of the payload bits of a domestic trunk interface (DS1) frame. A slip might happen when there is a difference between the timing of a synchronous receiving terminal and the received signal.
    Fr loss secs Indicates the number of seconds an Out of Frame (OOF) error is detected.
    Line Err secs Line Errored Seconds (LES) is a second in which one or more Line Code Violation errors are detected.
    Degraded mins A degraded minute is one in which the estimated error rate exceeds 1E-6 but does not exceed 1E-3.
    Errored secs In ESF and E1 CRC links, an errored second is a second in which one of the following defects is detected:
    • One or more Path Code Violations.
    • One or more Out of Frame defects.
    • One or more Controlled Slip events.
    • An AIS defect.
    For SF and E1 no-CRC links, the presence of Bipolar Violations also triggers an errored second.
    Bursty Err secs A second with more than one but fewer than 320 Path Coding Violation errors, no Severely Errored Frame defects and no detected incoming AIS defects. Controlled slips are not included in this parameter.
    Severely Err secs For ESF signals, this is a second in which one of the following defects is detected:
    • 320 or more Path Code Violation errors.
    • One or more Out of Frame defects.
    • An AIS defect.
    For E1-CRC signals, this is a second with one of the following errors:
    • 832 or more Path Code Violation errors.
    • One or more Out of Frame defects.
    For E1-nonCRC signals, this is a second with 2048 Line Code Violations or more. For D4 signals, this means a count of 1-second intervals with Framing Errors, an Out of Frame defect, or 1544 Line Code Violations.
    Unavail Secs A count of the total number of seconds on the interface. This field is calculated by counting the number of seconds that the interface is unavailable.

    Note: For additional information, see Understanding the show controllers e1 Command and E1 Troubleshooting.

    Use the information from the show controllers command to check the following:

    Troubleshooting CDS3 Frame Relay Interfaces

    This section describes specific processes and commands used to troubleshoot the channelized DS3 Frame Relay port adapter (CDS3).

    Interface Module LEDs

    The port adapter faceplate LEDs provide status information for individual channelized DS3 Frame Relay port adapter (CDS3) coaxial interface connections of the port adapter. The LEDs are described in the following table.

    LED Status Description
    CD (carrier detect) Off Green Carrier detect signal not received. Carrier detect signal received.
    RX (Receive) Off Flashing green Red LOS1 or port adapter is shut down. Cells are being received. LED blinks every five seconds and pulse rate increases with data rate. Alarm (LOF2, LCD3, AIS4).
    TX (Transmit) Off Flashing green Flashing yellow Steady yellow No transmit line activity indication. Cells are being transmitted. LED pulse rate increases with data rate. Loopback. FERF5 alarm.

    1LOS = loss of signal

    2LOF = loss of frame

    3LCD = loss of cell delineation

    4AIS = alarm indication signal

    5FERF = far-end receive failure

    Using the show controllers Command with CDS3 Frame Relay Interfaces

    Use the following command to display the CDS3 Frame Relay interface configuration:

    show controllers atm card/subcard/port

    The show controllers atm card/subcard/port command shows the interface memory management and error counters. Use it to check memory management and error counters. 

    Switch#show controllers e1 4/0/0

E1 4/0/0 is down.
  PAM state is Up
  FPGA Version:  fi-c8510-4e1fr.A.3.2
  Firmware Version: fi-c8510-4e1fr.A.2.3
   Transmitter is sending LOF Indication (RAI).
  
   Receiver has loss of signal.
  Framing is crc4, Line Code is HDB3, Clock Source is line.
  Data in current interval (143 seconds elapsed):
     0 Line Code Violations, 0 Path Code Violations
     0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
     0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
     143 Unavail Secs
  Data in Interval 1:
     0 Line Code Violations, 0 Path Code Violations
     0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
     0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
     900 Unavail Secs
.
(Information Deleted)
.
     Total Data (last 95 15 minute intervals):
     2 Line Code Violations,0 Path Code Violations,
     0 Slip Secs, 0 Fr Loss Secs, 2 Line Err Secs, 0 Degraded Mins,
     0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
     1833290 Unavail Secs, 0 Stuffed Secs
Switch#

    The following table lists the best troubleshooting fields in the show controllers command:

    Field Description
    E1 is up Shows that the E1 controller 0 is operating. The controller's state can be up, down, or administratively down. Loopback conditions are shown as locally looped or remotely looped.
    Applique Type Shows the hardware applique type and indicates whether it is balanced or unbalanced.
    Framing Shows the current framing type. The default framing for E1 is cyclic redundancy check 4 (CRC4).
    Line Code Shows the current line code. The default line coding for E1 is HDB3.
    No alarms detected Any alarms detected by the controller are displayed here. The possible alarms are:
    • Transmitter is sending remote alarm.
    • Transmitter is sending alarm indication signal (AIS).
    • Receiver has loss of signal.
    • Receiver is getting AIS.
    • Receiver has loss of frame.
    • Receiver has remote alarm.
    • Receiver has no alarms.
    Data in current interval (251 seconds elapsed) Shows the current accumulation period, which rolls into a 24-hour accumulation every 15 minutes. The accumulation period is from one to 900 seconds. The oldest 15-minute period falls off the back of the 24-hour accumulation buffer.
    Line Code Violations Indicates the occurrence of either a Bipolar Violation (BPV) or Excessive Zeros (EXZ) error event.
    Path Code Violations Indicates a frame synchronization bit error in the D4 and E1-no CRC formats or a CRC error in the Extended Superframe (ESF) and E1-CRC formats.
    Slip secs Indicates the replication or deletion of the payload bits of a domestic trunk interface (DS1) frame. A slip might happen when there is a difference between the timing of a synchronous receiving terminal and the received signal.
    Fr loss secs Indicates the number of seconds an Out of Frame (OOF) error is detected.
    Line Err secs Line Errored Seconds (LES) is a second in which one or more Line Code Violation errors are detected.
    Degraded mins A degraded minute is one in which the estimated error rate exceeds 1E-6 but does not exceed 1E-3.
    Errored secs In ESF and E1 CRC links, an errored second is a second in which one of the following defects is detected:
    • One or more Path Code Violations.
    • One or more Out of Frame defects.
    • One or more Controlled Slip events.
    • An AIS defect.
    For SF and E1 no-CRC links, the presence of Bipolar Violations also triggers an errored second.
    Bursty Err secs A second with more than one but fewer than 320 Path Coding Violation errors, no Severely Errored Frame defects and no detected incoming AIS defects. Controlled slips are not included in this parameter.
    Severely Err secs For ESF signals, this is a second in which one of the following defects is detected:
    • 320 or more Path Code Violation errors.
    • One or more Out of Frame defects.
    • An AIS defect.
    For E1-CRC signals, this is a second with one of the following errors:
    • 832 or more Path Code Violation errors.
    • One or more Out of Frame defects.
    For E1-nonCRC signals, this is a second with 2048 Line Code Violations or more. For D4 signals, this means a count of 1-second intervals with Framing Errors, an Out of Frame defect, or 1544 Line Code Violations.
    Unavail Secs A count of the total number of seconds on the interface. This field is calculated by counting the number of seconds that the interface is unavailable.

    Note: For additional information, see Understanding the show controllers e1 Command and E1 Troubleshooting.

    Use the information from the show controllers command to check the following:

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    Updated: Jun 05, 2005Document ID: 21390