Feedback
|
Table Of Contents
Release Notes for Cisco CRS-1 and Cisco CRS-3 for Cisco IOS XR Software Release 4.0.3
Determining Your Software Version
Cisco CRS-1 show version Output
Cisco CRS-3 show version Output
New Cisco CRS Router-Specific Software Features
Online Diagnostics Enhancements
FabSRCC Test on Cisco CRS-3 Line Cards
path-selection ignore overload (MPLS-TE) Command
CRS Reliability Command Feature
Configurable ASIC Reset Threshold Feature
Configurable MSC/Fabric Board Reload Threshold Feature
New Hardware Features for the Cisco CRS Router
New DWDM Configuration Requirement
Summary of Important DWDM Changes in Cisco IOS XR Software Release 3.9.0 and Later Releases
Configuration Examples in Cisco IOS XR Software Release 3.9.0 and Later Releases
Minimum Flash Disk Requirements When Upgrading to Release 4.0.3
Caveats Specific to the Cisco CRS-1 and the Cisco CRS-3 Routers
Caveats Specific to the Cisco CRS-3 Router
Upgrading Cisco IOS XR Software
Migrating Cisco CRS-1 to Cisco CRS-3
Obtaining Documentation and Submitting a Service Request
Release Notes for Cisco CRS-1 and Cisco CRS-3 for Cisco IOS XR Software Release 4.0.3
April 23, 2013
Cisco IOS XR Software Release 4.0.3
Text Part Number OL-25009-02
These release notes describe the features provided in the Cisco IOS XR Software Release 4.0.3 for the Cisco CRS Router and are updated as needed.
Note
For information on the Cisco CRS Router running Cisco IOS XR Software Release 4.0.3, see the "Important Notes" section.
You can find the most current Cisco IOS XR software documentation at
http://www.cisco.com/en/US/products/ps5763/tsd_products_support_series_home.html
These electronic documents may contain updates and modifications. For more information on obtaining Cisco documentation, see the "Obtaining Documentation and Submitting a Service Request".
For a list of software caveats that apply to Cisco IOS XR Software Release 4.0.3, see the "Caveats" section. The caveats are updated for every release and are described at www.cisco.com.
We recommend that you view the field notices for this release located at the following URL to see if your software or hardware platforms are affected:
http://www.cisco.com/public/support/tac/fn_index.html
Contents
These release notes contain the following sections:
•
Determining Your Software Version
•
New Cisco CRS Router-Specific Software Features
•
New Hardware Features for the Cisco CRS Router
•
Upgrading Cisco IOS XR Software
•
Migrating Cisco CRS-1 to Cisco CRS-3
•
Obtaining Documentation and Submitting a Service Request
Introduction
Cisco IOS XRsoftware is a distributed operating system designed for continuous system operation combined with service flexibility and high performance.
Cisco IOS XR software running on the Cisco CRS Router provides the following features and benefits:
•
IP and Routing—Supports a wide range of IPv4 and IPv6 services and routing protocols; such as Border Gateway Protocol (BGP), Routing Information Protocol (RIPv2), Intermediate System-to-Intermediate System (IS-IS), Open Shortest Path First (OSPF), IP Multicast, Routing Policy Language (RPL), Hot Standby Router Protocol (HSRP), and Virtual Router Redundancy Protocol features (VRRP).
•
BGP Prefix Independent Convergence—Provides the ability to converge BGP routes within sub seconds instead of multiple seconds. The Forwarding Information Base (FIB) is updated, independent of a prefix, to converge multiple 100K BGP routes with the occurrence of a single failure. This convergence is applicable to both core and edge failures and with or with out MPLS. This fast convergence innovation is unique to Cisco IOS XR software.
•
Multiprotocol Label Switching (MPLS)—Supports MPLS protocols, including Traffic Engineering (TE), Resource Reservation Protocol (RSVP), Label Distribution Protocol (LDP), Virtual Private LAN Service (VPLS), Layer 2 Virtual Private Network (L2VPN), and Layer 3 Virtual Private Network (L3VPN).
•
Multicast—Provides comprehensive IP Multicast software including Source Specific Multicast (SSM) and Protocol Independent Multicast (PIM) in Sparse Mode only, and Bidirectional Protocol Independent Multicast (BIDIR-PIM).
•
Quality of Service (QoS)—Supports QoS mechanisms including policing, marking, queuing, random and hard traffic dropping, and shaping. Additionally, Cisco IOS XR software also supports modular QoS command-line interface (MQC). MQC is used to configure QoS features.
•
Manageability—Provides industry-standard management interfaces including modular command-line interface (CLI), Simple Network Management Protocol (SNMP), and native Extensible Markup Language (XML) interfaces. Includes a comprehensive set of Syslog messages.
•
Security—Provides comprehensive network security features including access control lists (ACLs); routing authentications; Authentication, Authorization, and Accounting (AAA)/Terminal Access Controller Access Control System (TACACS+); Secure Shell (SSH); Management Plane Protection (MPP) for management plane security; and Simple Network Management Protocol version3 (SNMPv3). Control plane protections integrated into line card Application-Specific Integrated Circuits (ASICs) include Generalized TTL Security Mechanism (GTSM), RFC 3682, and Dynamic Control Plane Protection (DCPP).
•
Availability—Supports rich availability features such as fault containment, fault tolerance, fast switchover, link aggregation, nonstop routing for ISIS, LDP, BGP, and OSPF, and nonstop forwarding (NSF).
•
Multicast service delivery in SP NGN—MVPNv4 support carries multicast traffic over an ISP MPLS core network.
•
IPv6 Provider Edge Router support for IPv6 applications—Delivers IPv6 traffic over an IPv4/MPLS core with IPv6 provider edge router (6PE) support.
•
IPv6 VPN over MPLS (6VPE) support—Delivers IPv6 VPN over MPLS (IPv6) VPN traffic over an IPv4 or MPLS core with 6VPE support.
•
Enhanced core competencies:
–
IP fast convergence with Fast Reroute (FRR) support for Intermediate System-to-Intermediate System (IS-IS) and OSPF
–
Traffic engineering support for unequal load balancing
–
Traffic engineering over generic routing encapsulation (GRE) tunnel interfaces—LDP, L2VPN, and L3VPN over TE over GRE are supported. VPN routes over TE and over GRE, require a labelled path for path resolution.
–
VRF support for GRE tunnel interfaces—This support includes GRE tunnel interfaces under a VRF, however the GRE tunnel source and destination are in the global table.
–
RSVP support over GRE tunnels
–
Path Computation Element (PCE) capability for traffic engineering
For more information about new features provided on the Cisco CRS Router for Cisco IOS XR Software Release 4.0.3, see the "New Cisco CRS Router-Specific Software Features" section in this document.
System Requirements
This section describes the system requirements for Cisco IOS XR Software Release 4.0.3 supported on the Cisco CRS Router. The system requirements include the following information:
•
Cisco CRS-1 Feature Set Table
To determine the software versions or levels of your current system, see the "Determining Your Software Version" section.
Cisco CRS-1 Feature Set Table
Cisco IOS XR software is packaged in feature sets (also called software images). Each feature set contains a specific set of Cisco IOS XR Software Release 4.0.3 features.
Table 1 lists the Cisco IOS XR software feature set matrix (PIE files) and associated filenames available for the Cisco IOS XR Software Release 4.0.3 supported on the Cisco CRS-1 Series Router.
Table 1 Cisco CRS-1 Supported Feature Sets
(Cisco IOS XR Software Release 4.0.3 PIE Files) Feature Set Filename Description Composite PackageCisco IOS XR IP Unicast Routing Core Bundle
hfr-mini-p-4.0.3
Contains the required core packages, including OS, Admin, Base, Forwarding, Modular Services Card, Routing, SNMP Agent, and Alarm Correlation.
Cisco IOS XR IP Unicast Routing Core Bundle
hfr-mini-p.vm-4.0.3
Contains the required core packages including OS, Admin, Base, Forwarding, Modular Services Card, Routing, SNMP Agent, and Alarm Correlation.
Optional Individual Packages1Cisco IOS XR Manageability Package
hfr-mgbl-p.pie-4.0.3
Cisco IOS XR MPLS Package
hfr-mpls-p.pie-4.0.3
MPLS-TE,4 LDP,5 MPLS Forwarding, MPLS OAM,6 LMP,7 OUNI,8 RSVP,9 and Layer-2 VPN and Layer-3 VPN.
Cisco IOS XR Multicast Package
hfr-mcast-p.pie-4.0.3
Multicast Routing Protocols (PIM, MSDP,10 IGMP,11 Auto-RP), Tools (SAP, MTrace), and Infrastructure (MRIB,12 MURIB13 , MFWD14 ), and BIDIR-PIM.15
Cisco IOS XR Security Package
hfr-k9sec-p.pie-4.0.3
Support for Encryption, Decryption, IPSec,16 SSH,17 SSL,18 and PKI19 (Software based IPSec support—maximum of 500 tunnels)
Cisco IOS XR FPD Package
hfr-fpd-p.pie-4.0.3
Firmware for Fixed PLIM20 and SPA21 modules as well as ROMMON22 images for Cisco CRS chassis.
Cisco IOS XR Diagnostic Package
hfr-diags-p.pie-4.0.3
Diagnostic utilities for Cisco IOS XR routers.
Cisco IOS XR Documentation Package
hfr-doc-p.pie-4.0.3
.man pages for Cisco IOS XR software on the Cisco CRS chassis.
Cisco IOS XR Carrier Grade NAT Package
hfr-cgn-p.pie-4.0.3
Support for Carrier Grade NAT on Cisco CRS routers.
1 Packages are installed individually
2 Common Object Request Broker Architecture
3 Extensible Markup Language
4 MPLS Traffic Engineering
5 Label Distribution Protocol
6 Operations, Administration, and Maintenance
7 Link Manager Protocol
8 Optical User Network Interface
9 Resource Reservation Protocol
10 Multicast Source Discovery Protocol
11 Internet Group Management Protocol
12 Multicast Routing Information Base
13 Multicast-Unicast RIB
14 Multicast forwarding
15 Bidirectional Protocol Independent Multicast
16 IP Security
17 Secure Shell
18 Secure Socket Layer
19 Public-key infrastructure
20 Physical layer interface module
21 Shared port adapters
22 ROM monitor
Table 2 lists the Cisco CRS-1 Router TAR files.
Cisco CRS-3 Feature Set Table
Table 3 lists the Cisco IOS XR software feature set matrix (PIE files) and associated filenames available for the Cisco IOS XR Software Release 4.0.3 supported on the Cisco CRS-3 Router.
Table 3 Cisco CRS-3 Supported Feature Sets
(Cisco IOS XR Software Release 4.0.3 PIE Files) Feature Set Filename Description Composite PackageCisco IOS XR IP Unicast Routing Core Bundle
hfr-mini-px-4.0.3
Contains the required core packages, including OS, Admin, Base, Forwarding, Modular Services Card, Routing, SNMP Agent, and Alarm Correlation.
Cisco IOS XR IP Unicast Routing Core Bundle
hfr-mini-px.vm-4.0.3
Contains the required core packages including OS, Admin, Base, Forwarding, Modular Services Card, Routing, SNMP Agent, and Alarm Correlation.
Optional Individual Packages1Cisco IOS XR Manageability Package
hfr-mgbl-px.pie-4.0.3
Cisco IOS XR MPLS Package
hfr-mpls-px.pie-4.0.3
MPLS-TE,4 LDP,5 MPLS Forwarding, MPLS OAM,6 LMP,7 OUNI,8 RSVP,9 and Layer-2 VPN and Layer-3 VPN.
Cisco IOS XR Multicast Package
hfr-mcast-px.pie-4.0.3
Multicast Routing Protocols (PIM, MSDP,10 IGMP,11 Auto-RP), Tools (SAP, MTrace), and Infrastructure (MRIB,12 MURIB13 , MFWD14 ), and BIDIR-PIM.15
Cisco IOS XR Security Package
hfr-k9sec-px.pie-4.0.3
Support for Encryption, Decryption, IPSec,16 SSH,17 SSL,18 and PKI19 (Software based IPSec support—maximum of 500 tunnels)
Cisco IOS XR FPD Package
hfr-fpd-px.pie-4.0.3
Firmware for Fixed PLIM20 and SPA21 modules as well as ROMMON22 images for Cisco CRS chassis.
Cisco IOS XR Diagnostic Package
hfr-diags-px.pie-4.0.3
Diagnostic utilities for Cisco IOS XR routers.
Cisco IOS XR Documentation Package
hfr-doc-px.pie-4.0.3
.man pages for Cisco IOS XR software on the Cisco CRS chassis.
Cisco IOS XR Carrier Grade NAT Package
hfr-cgn-px.pie-4.0.3
Support for Carrier Grade NAT on Cisco CRS routers.
1 Packages are installed individually
2 Common Object Request Broker Architecture
3 Extensible Markup Language
4 MPLS Traffic Engineering
5 Label Distribution Protocol
6 Operations, Administration, and Maintenance
7 Link Manager Protocol
8 Optical User Network Interface
9 Resource Reservation Protocol
10 Multicast Source Discovery Protocol
11 Internet Group Management Protocol
12 Multicast Routing Information Base
13 Multicast-Unicast RIB
14 Multicast forwarding
15 Bidirectional Protocol Independent Multicast
16 IP Security
17 Secure Shell
18 Secure Socket Layer
19 Public-key infrastructure
20 Physical layer interface module
21 Shared port adapters
22 ROM monitor
Table 4 lists the Cisco CRS-3 Router TAR files.
Memory Requirements
CautionIf you remove the media in which the software image or configuration is stored, the router may become unstable and fail.
The minimum memory requirements for a Cisco CRS running Cisco IOS XR Software Release 4.0.3 consist of the following:
•
4-GB memory on the route processors (RPs)
•
2-GB memory on Modular Services Card (MSC-40) and Forwarding Processor (FP-40)
•
4-GB memory on MSC-140 and FP-140
•
4-GB USB on MSC-140 and FP-140
•
2-GB PCMCIA Flash Disk
Hardware Supported
All hardware features are supported on Cisco IOS XR software, subject to the memory requirements specified in the "Memory Requirements" section.
Table 5 lists the supported hardware components on the Cisco CRS and the minimum required software versions. For more information, see the "Other Firmware Support" section.
Note
With Cisco IOS XR Release 4.0.0 PX, CRS MSC-140 or CRS FP-140 can only be used for Provider (P) router configuration. With Cisco IOS XR Software Release 4.0.3 PX, 6PE alone is supported in Cisco CRS-3 Routers as a PE feature. No other PE edge facing feature is supported in Cisco CRS-3 Routers with Cisco IOS XR Software Release 4.0.3. Also, with Cisco IOS XR Software Release 4.0.3 PX, the CRS-3 can be positioned at the edge as a pure Layer 3 edge router, with no VPN features. Please contact your Cisco representative for more information.
Note
The USB Flash drive is recognized as disk2 on a Performance Route Processor (PRP) during an online insertion and removal (OIR) or when the card is reloaded or reset at the ROMMON prompt. An OIR requires the PRP card to be removed and reinserted during the reset operation.
CRS FP-140 Licenses
The following licenses apply to the CRS FP-140:
Software Compatibility
Cisco IOS XR Software Release 4.0.3 is compatible with the following Cisco CRS-1 systems:
•
Cisco CRS 4-Slot Line Card Chassis
•
Cisco CRS 8-Slot Line Card Chassis
•
Cisco CRS 16-Slot Line Card Chassis
•
Cisco CRS Multishelf Systems
Cisco IOS XR Software Release 4.0.3 is compatible with the following Cisco CRS-3 systems:
•
Cisco CRS 4-Slot Line Card Chassis
•
Cisco CRS 8-Slot Line Card Chassis
•
Cisco CRS 16-Slot Line Card Chassis
•
Cisco CRS Multishelf Systems
Other Firmware Support
The Cisco CRS supports the following firmware code:
•
The minimum ROMMON version required for this release is 2.01. For more information about ROMMON specifications, see http://www.cisco.com/web/Cisco_IOS_XR_Software/index.html. For information about upgrading the ROMMON, refer to the Cisco IOS XR ROM Monitor Guide for the Cisco CRS-1 Router at:
http://www.cisco.com/en/US/products/ps5763/products_installation_and_configuration_guides_list.html•
The minimum CPUCNTRL version required for this release is 2.07. For more information about CPU controller bits, refer to the Cisco IOS XR System Management Configuration Guide for the Cisco CRS-1 Router at: http://www.cisco.com/en/US/products/ps5763/products_installation_and_configuration_guides_list.html
•
If the FPDs need an upgrade or a downgrade, use the admin upgrade hw-module fpd command.
•
At least one FPD is running the minimum supported software version. To upgrade this FPD, use the admin upgrade hw-module fpd force command.
•
FPDs with current software versions of ?????.????? means that the software versions of the FPDs cannot be determined due to the state of the card or the FPD. To upgrade or downgrade these FPDs, use the "force" option of the admin upgrade hw-module fpd command.
Check the firmware needed by running the show fpd package command in admin mode.
Cisco CRS-1 show fpd package Output
08:16:37 PDT Fri May 06 2011===================================== ==========================================Existing Field Programmable Devices==========================================HW Current SW Upg/Location Card Type Version Type Subtype Inst Version Dng?============ ======================== ======= ==== ======= ==== =========== ====0/0/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/0/CPU0 8-10GBE 0.96 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/1/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/1/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/1/0 SPA-5X1GE-V2 1.2 spa fpga1 0 1.10 No--------------------------------------------------------------------------------0/1/2 SPA-8X1GE-V2 1.1 spa fpga1 2 1.10 No--------------------------------------------------------------------------------0/1/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------0/2/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/2/CPU0 MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/3/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/3/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/3/2 SPA-OC192POS 5.1 spa fpga1 2 1.03 No--------------------------------------------------------------------------------0/4/SP 40G-MSC 0.8 lc rommonA 0 2.00 Yeslc rommon 0 2.04 No--------------------------------------------------------------------------------0/4/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.00 Yeslc rommon 0 2.04 No--------------------------------------------------------------------------------0/4/0 SPA-10X1GE-V2 1.2 spa fpga1 0 1.10 No--------------------------------------------------------------------------------0/5/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/5/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/5/0 SPA-4XOC48POS/RPR 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------0/5/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------0/6/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/6/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/6/0 SPA-10X1GE-V2 1.2 spa fpga1 0 1.10 No--------------------------------------------------------------------------------0/6/5 SPA-4XOC48POS/RPR 1.0 spa fpga1 5 1.00 No--------------------------------------------------------------------------------0/7/SP DRP_B 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/7/CPU0 DRP_B 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/7/CPU1 DRP_B 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/9/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/9/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/9/0 SPA-4XOC48POS/RPR 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------0/9/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------0/10/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/10/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/10/0 SPA-4XOC48POS/RPR 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------0/10/5 SPA-4XOC48POS/RPR 1.0 spa fpga1 5 1.00 No--------------------------------------------------------------------------------0/11/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/11/CPU0 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/12/SP 40G-MSC 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/12/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/12/0 SPA-8X1GE-V2 1.1 spa fpga1 0 1.10 No--------------------------------------------------------------------------------0/13/SP MSC_B 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/13/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/13/0 SPA-8X1GE-V2 1.1 spa fpga1 0 1.10 No--------------------------------------------------------------------------------0/15/SP DRP_B 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/15/CPU0 DRP_B 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/15/CPU1 DRP_B 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/RP0/CPU0 RP 0.5 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/RP1/CPU0 RP 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/FC0/SP CRS-16-LCC-FAN-CT 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/FC1/SP CRS-16-LCC-FAN-CT 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/AM0/SP CRS-16-ALARM N/A lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/AM1/SP CRS-16-ALARM 0.255 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/SM0/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/SM1/SP S1S3 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/SM2/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/SM3/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/0/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/0/CPU0 4-10GE 0.96 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/1/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/1/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/1/0 SPA-4XOC48POS/RPR 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------1/1/2 SPA-8X1GE-V2 1.1 spa fpga1 2 1.10 No--------------------------------------------------------------------------------1/1/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------1/2/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/2/CPU0 OC48-POS-16-ED 0.88 lc fpga1 0 9.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/3/SP 40G-MSC 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/3/CPU0 40G-MSC 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/4/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/4/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/4/0 SPA-10X1GE-V2 1.2 spa fpga1 0 1.10 No--------------------------------------------------------------------------------1/4/5 SPA-4XOC48POS/RPR 1.0 spa fpga1 5 1.00 No--------------------------------------------------------------------------------1/5/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/5/CPU0 CRS1-SIP-800 0.104 lc fpga 0 5.00* Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/5/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------1/6/SP 40G-MSC 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/6/CPU0 OC48-POS-16-ED 0.80 lc fpga1 0 9.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/10/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/10/CPU0 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/11/SP MSC_B 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/11/CPU0 MSC_B 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/12/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/12/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/12/0 SPA-8X1GE-V2 1.1 spa fpga1 0 1.10 No--------------------------------------------------------------------------------1/12/2 SPA-OC192POS-XFP 2.1 spa fpga1 2 1.02 No--------------------------------------------------------------------------------1/RP0/CPU0 RP 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/RP1/CPU0 RP 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/FC0/SP CRS-16-LCC-FAN-CT 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/FC1/SP CRS-16-LCC-FAN-CT 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/AM0/SP CRS-16-ALARM 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/AM1/SP CRS-16-ALARM 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/SM0/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/SM1/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/SM2/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/SM3/SP S1S3 N/A lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/0/SP MSC_B 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/0/CPU0 8-10GBE 0.96 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/1/SP MSC_B 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/1/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/1/0 SPA-10X1GE-V2 1.2 spa fpga1 0 1.10 No--------------------------------------------------------------------------------2/3/SP MSC_B 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/3/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/3/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------2/4/SP MSC_B 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/4/CPU0 CRS1-SIP-800 0.96 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/4/0 SPA-8X1GE-V2 1.1 spa fpga1 0 1.10 No--------------------------------------------------------------------------------2/5/SP MSC_B 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/5/CPU0 CRS1-SIP-800 0.96 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/5/0 SPA-4XOC48POS/RPR 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------2/5/2 SPA-1X10GE-WL-V2 1.0 spa fpga1 2 1.11 No--------------------------------------------------------------------------------2/6/SP MSC_B 0.1 lc rommonA 0 2.00 Yeslc rommon 0 2.04 No--------------------------------------------------------------------------------2/6/CPU0 CRS1-SIP-800 0.96 lc fpga1 0 6.00 Nolc rommonA 0 2.00 Yeslc rommon 0 2.04 No--------------------------------------------------------------------------------2/7/SP MSC_B 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/7/CPU0 CRS1-SIP-800 0.96 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/7/0 SPA-4XOC48POS/RPR 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------2/9/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/9/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/9/0 SPA-4XOC48POS/RPR 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------2/10/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/10/CPU0 CRS1-SIP-800 0.88 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/10/0 SPA-4XOC48POS/RPR 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------2/11/SP MSC_B 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/11/CPU0 MSC_B 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/12/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/12/CPU0 CRS1-SIP-800 0.120 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/14/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/14/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/RP0/CPU0 RP 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/RP1/CPU0 RP 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/FC0/SP CRS-16-LCC-FAN-CT 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/FC1/SP CRS-16-LCC-FAN-CT 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/AM0/SP CRS-16-ALARM 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/AM1/SP CRS-16-ALARM 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/SM0/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/SM1/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/SM2/SP S1S3 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/SM3/SP S1S3 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/0/SP MSC_B 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/0/CPU0 8-10GBE 0.96 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/1/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/1/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/1/0 SPA-4XOC48POS/RPR 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------3/2/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/2/CPU0 CRS1-SIP-800 0.120 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/2/0 SPA-8X1GE 2.2 spa fpga1 0 1.08 No--------------------------------------------------------------------------------3/2/2 SPA-1X10GE-WL-V2 1.0 spa fpga1 2 1.11 No--------------------------------------------------------------------------------3/3/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/3/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/3/0 SPA-4XOC48POS/RPR 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------3/3/2 SPA-1X10GE-L-V2 1.2 spa fpga1 2 1.11 No--------------------------------------------------------------------------------3/4/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/4/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/4/0 SPA-8X1GE-V2 1.1 spa fpga1 0 1.10 No--------------------------------------------------------------------------------3/5/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/5/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/5/0 SPA-OC192POS-XFP 2.4 spa fpga1 0 1.02 No--------------------------------------------------------------------------------3/5/2 SPA-4XOC48POS/RPR 1.0 spa fpga1 2 1.00 No--------------------------------------------------------------------------------3/6/SP MSC_B 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/6/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/6/0 SPA-OC192POS-XFP 2.4 spa fpga1 0 1.02 No--------------------------------------------------------------------------------3/6/2 SPA-8X1GE 2.2 spa fpga1 2 1.08 No--------------------------------------------------------------------------------3/9/SP MSC_B 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/9/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/9/0 SPA-4XOC48POS/RPR 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------3/10/SP MSC_B 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/10/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/10/0 SPA-4XOC48POS/RPR 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------3/RP0/CPU0 RP 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/RP1/CPU0 RP 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/FC0/SP CRS-16-LCC-FAN-CT 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/FC1/SP CRS-16-LCC-FAN-CT 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/AM0/SP CRS-16-ALARM 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/AM1/SP CRS-16-ALARM 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/SM0/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/SM1/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/SM2/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/SM3/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SM0/SP S2 N/A lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SM1/SP S2 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SM2/SP S2 N/A lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SM9/SP S2 0.2 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SM10/SP S2 N/A lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SM12/SP S2 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SM13/SP S2 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SM14/SP S2 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SM21/SP S2 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SM22/SP S2 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SM23/SP S2 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SC0/CPU0 Shelf Controller GE22 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SC1/CPU0 Shelf Controller GE22 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/AM0/SP CRS-16-ALARM 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/AM1/SP CRS-16-ALARM 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/LM0/SP CRS-FCC-LED 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/LM1/SP LED N/A lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------Cisco CRS-3 show fpd package Output
0===================================== ==========================================Existing Field Programmable Devices==========================================HW Current SW Upg/Location Card Type Version Type Subtype Inst Version Dng?============ ======================== ======= ==== ======= ==== =========== ====0/0/SP 40G-MSC 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/0/CPU0 OC48-POS-16-ED 0.80 lc fpga1 0 9.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/1/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/1/CPU0 8-10GBE 0.96 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/2/SP 40G-MSC 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/2/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/2/0 SPA-10X1GE-V2 1.2 spa fpga1 0 1.10 No--------------------------------------------------------------------------------0/2/1 SPA-1X10GE-WL-V2 1.0 spa fpga1 1 1.11 No--------------------------------------------------------------------------------0/2/2 SPA-10X1GE-V2 1.2 spa fpga1 2 1.10 No--------------------------------------------------------------------------------0/2/4 SPA-1X10GE-L-V2 1.2 spa fpga1 4 1.11 No--------------------------------------------------------------------------------0/3/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/3/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/3/0 SPA-OC192POS-XFP 2.4 spa fpga1 0 1.02 No--------------------------------------------------------------------------------0/3/2 SPA-OC192POS-XFP 2.1 spa fpga1 2 1.02 No--------------------------------------------------------------------------------0/3/3 SPA-OC192POS-XFP 2.3 spa fpga1 3 1.02 No--------------------------------------------------------------------------------0/3/5 SPA-OC192POS-XFP 2.3 spa fpga1 5 1.02 No--------------------------------------------------------------------------------0/4/SP 40G-MSC 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/4/CPU0 40G-MSC 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/5/SP 40G-MSC 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/5/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/5/0 SPA-1X10GE-WL-V2 1.0 spa fpga1 0 1.11 No--------------------------------------------------------------------------------0/5/2 SPA-4XOC48POS/RPR 1.0 spa fpga1 2 1.00 No--------------------------------------------------------------------------------0/5/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------0/5/5 SPA-1X10GE-WL-V2 1.0 spa fpga1 5 1.11 No--------------------------------------------------------------------------------0/6/SP 40G-MSC 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/6/CPU0 8-10GBE 0.80 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/7/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/7/CPU0 8-10GBE 0.1 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/8/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/8/CPU0 CRS1-SIP-800 0.3 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/8/0 SPA-4XOC3-POS 1.0 spa fpga1 0 3.04 No--------------------------------------------------------------------------------0/8/2 SPA-4XOC3-POS 1.0 spa fpga1 2 3.04 No--------------------------------------------------------------------------------0/8/3 SPA-4XOC3-POS 1.0 spa fpga1 3 3.04 No--------------------------------------------------------------------------------0/8/4 SPA-8XOC12-POS 1.0 spa fpga1 4 1.00 No--------------------------------------------------------------------------------0/8/5 SPA-4XOC3-POS 1.0 spa fpga1 5 3.04 No--------------------------------------------------------------------------------0/9/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/9/CPU0 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/10/SP 40G-MSC 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/10/CPU0 8-10GBE 0.80 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/11/SP MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/11/CPU0 MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/12/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/12/CPU0 OC48-POS-16-ED 0.80 lc fpga1 0 9.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/13/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/13/CPU0 CRS1-SIP-800 0.136 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/13/0 SPA-8X1GE-V2 1.1 spa fpga1 0 1.10 No--------------------------------------------------------------------------------0/13/1 SPA-8X1GE 2.2 spa fpga1 1 1.08 No--------------------------------------------------------------------------------0/13/3 SPA-8X1GE 2.2 spa fpga1 3 1.08 No--------------------------------------------------------------------------------0/14/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/14/CPU0 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/RP0/CPU0 PRP N/A lc rommonA 0 2.03 No--------------------------------------------------------------------------------0/RP0/CPU0 PRP N/A lc rommon 1 2.04 No--------------------------------------------------------------------------------0/RP0/CPU0 PRP 7.0 lc fpga1 2 7.00 No--------------------------------------------------------------------------------0/RP0/CPU0 PRP N/A lc fpga2 3 0.01 No--------------------------------------------------------------------------------0/RP0/CPU0 PRP 13.0 lc fpga3 4 13.00 No--------------------------------------------------------------------------------0/RP0/CPU0 PRP N/A lc fpga4 5 0.01 No--------------------------------------------------------------------------------0/RP0/CPU0 PRP N/A lc fpga5 6 0.01 No--------------------------------------------------------------------------------0/RP1/CPU0 PRP N/A lc rommonA 0 2.03 No--------------------------------------------------------------------------------0/RP1/CPU0 PRP N/A lc rommon 1 2.04 No--------------------------------------------------------------------------------0/RP1/CPU0 PRP 7.0 lc fpga1 2 7.00 No--------------------------------------------------------------------------------0/RP1/CPU0 PRP N/A lc fpga2 3 0.01 No--------------------------------------------------------------------------------0/RP1/CPU0 PRP 13.0 lc fpga3 4 13.00 No--------------------------------------------------------------------------------0/RP1/CPU0 PRP N/A lc fpga4 5 0.01 No--------------------------------------------------------------------------------0/RP1/CPU0 PRP N/A lc fpga5 6 0.01 No--------------------------------------------------------------------------------0/FC0/SP CRS-16-LCC-FAN-CT 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/FC1/SP CRS-16-LCC-F-CT-B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 No--------------------------------------------------------------------------------0/AM0/SP CRS-16-ALARM 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/AM1/SP CRS-16-ALARM 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/SM0/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/SM1/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/SM2/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/SM3/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/SM4/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------0/SM5/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/0/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/0/CPU0 CRS1-SIP-800 0.136 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/0/0 SPA-8XOC12-POS 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------1/0/1 SPA-8XOC12-POS 1.0 spa fpga1 1 1.00 No--------------------------------------------------------------------------------1/0/3 SPA-8X1GE 2.2 spa fpga1 3 1.08 No--------------------------------------------------------------------------------1/1/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/1/CPU0 8-10GBE 0.255 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/2/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/2/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/2/0 SPA-10X1GE-V2 1.2 spa fpga1 0 1.10 No--------------------------------------------------------------------------------1/2/1 SPA-1X10GE-WL-V2 1.0 spa fpga1 1 1.11 No--------------------------------------------------------------------------------1/2/2 SPA-10X1GE-V2 1.2 spa fpga1 2 1.10 No--------------------------------------------------------------------------------1/2/4 SPA-1X10GE-WL-V2 1.0 spa fpga1 4 1.11 No--------------------------------------------------------------------------------1/3/SP 40G-MSC 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/3/CPU0 CRS1-SIP-800 0.88 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/3/0 SPA-OC192POS-XFP 2.4 spa fpga1 0 1.02 No--------------------------------------------------------------------------------1/3/2 SPA-OC192POS-XFP 2.4 spa fpga1 2 1.02 No--------------------------------------------------------------------------------1/3/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------1/4/SP 40G-MSC 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/4/CPU0 40G-MSC 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/5/SP MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/5/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/5/0 SPA-1X10GE-WL-V2 1.0 spa fpga1 0 1.11 No--------------------------------------------------------------------------------1/5/2 SPA-4XOC48POS/RPR 1.0 spa fpga1 2 1.00 No--------------------------------------------------------------------------------1/5/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------1/5/5 SPA-1X10GE-WL-V2 1.0 spa fpga1 5 1.11 No--------------------------------------------------------------------------------1/6/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/6/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/7/SP MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/7/CPU0 8-10GBE 0.80 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/8/SP MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/8/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/8/0 SPA-4XOC3-POS 1.0 spa fpga1 0 3.04 No--------------------------------------------------------------------------------1/8/1 SPA-8XOC12-POS 1.0 spa fpga1 1 1.00 No--------------------------------------------------------------------------------1/8/2 SPA-4XOC3-POS 1.0 spa fpga1 2 ?????.????? Yes--------------------------------------------------------------------------------1/8/3 SPA-4XOC3-POS 1.0 spa fpga1 3 3.04 No--------------------------------------------------------------------------------1/8/4 SPA-8XOC12-POS 0.6 spa fpga1 4 1.00 No--------------------------------------------------------------------------------1/8/5 SPA-4XOC3-POS 1.0 spa fpga1 5 3.04 No--------------------------------------------------------------------------------1/9/SP 40G-MSC 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/9/CPU0 40G-MSC 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/10/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/10/CPU0 8-10GBE 0.96 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/11/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/11/CPU0 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/12/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/12/CPU0 OC48-POS-16-ED 0.5 lc fpga1 0 7.00 Yeslc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/13/SP 40G-MSC 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/13/CPU0 CRS1-SIP-800 0.1 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/13/0 SPA-8X1GE-V2 1.1 spa fpga1 0 1.10 No--------------------------------------------------------------------------------1/13/1 SPA-8X1GE-V2 1.1 spa fpga1 1 1.10 No--------------------------------------------------------------------------------1/14/SP MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/14/CPU0 MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/15/SP MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/15/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/RP0/CPU0 PRP N/A lc rommonA 0 2.03 No--------------------------------------------------------------------------------1/RP0/CPU0 PRP N/A lc rommon 1 2.04 No--------------------------------------------------------------------------------1/RP0/CPU0 PRP 7.0 lc fpga1 2 7.00 No--------------------------------------------------------------------------------1/RP0/CPU0 PRP N/A lc fpga2 3 0.01 No--------------------------------------------------------------------------------1/RP0/CPU0 PRP 13.0 lc fpga3 4 13.00 No--------------------------------------------------------------------------------1/RP0/CPU0 PRP N/A lc fpga4 5 0.01 No--------------------------------------------------------------------------------1/RP0/CPU0 PRP N/A lc fpga5 6 0.01 No--------------------------------------------------------------------------------1/RP1/CPU0 PRP N/A lc rommonA 0 2.03 No--------------------------------------------------------------------------------1/RP1/CPU0 PRP N/A lc rommon 1 2.04 No--------------------------------------------------------------------------------1/RP1/CPU0 PRP 7.0 lc fpga1 2 7.00 No--------------------------------------------------------------------------------1/RP1/CPU0 PRP N/A lc fpga2 3 0.01 No--------------------------------------------------------------------------------1/RP1/CPU0 PRP 13.0 lc fpga3 4 13.00 No--------------------------------------------------------------------------------1/RP1/CPU0 PRP N/A lc fpga4 5 0.01 No--------------------------------------------------------------------------------1/RP1/CPU0 PRP N/A lc fpga5 6 0.01 No--------------------------------------------------------------------------------1/FC0/SP CRS-16-LCC-FAN-CT 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/FC1/SP CRS-16-LCC-FAN-CT 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/AM0/SP CRS-16-ALARM 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/AM1/SP CRS-16-ALARM 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/SM0/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/SM1/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/SM2/SP S1S3 N/A lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/SM3/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/SM4/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------1/SM5/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/0/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/0/CPU0 CRS1-SIP-800 0.120 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/0/0 SPA-8XOC12-POS 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------2/0/1 SPA-8XOC12-POS 1.0 spa fpga1 1 1.00 No--------------------------------------------------------------------------------2/0/3 SPA-8X1GE 2.2 spa fpga1 3 1.08 No--------------------------------------------------------------------------------2/1/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/1/CPU0 8-10GBE 0.80 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/2/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/2/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/2/0 SPA-10X1GE-V2 1.2 spa fpga1 0 1.10 No--------------------------------------------------------------------------------2/2/1 SPA-1X10GE-L-V2 1.0 spa fpga1 1 1.11 No--------------------------------------------------------------------------------2/2/2 SPA-10X1GE-V2 1.2 spa fpga1 2 1.10 No--------------------------------------------------------------------------------2/2/4 SPA-1X10GE-WL-V2 1.0 spa fpga1 4 1.11 No--------------------------------------------------------------------------------2/3/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/3/CPU0 CRS1-SIP-800 0.136 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/3/0 SPA-OC192POS-XFP 2.4 spa fpga1 0 1.02 No--------------------------------------------------------------------------------2/3/2 SPA-OC192POS-XFP 2.4 spa fpga1 2 1.02 No--------------------------------------------------------------------------------2/3/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------2/4/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/4/CPU0 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/5/SP 40G-MSC 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/5/CPU0 CRS1-SIP-800 0.136 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/5/0 SPA-1X10GE-WL-V2 1.0 spa fpga1 0 1.11 No--------------------------------------------------------------------------------2/5/2 SPA-4XOC48POS/RPR 1.0 spa fpga1 2 1.00 No--------------------------------------------------------------------------------2/5/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------2/5/5 SPA-1X10GE-WL-V2 1.0 spa fpga1 5 1.11 No--------------------------------------------------------------------------------2/6/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/6/CPU0 OC48-POS-16-ED 0.80 lc fpga1 0 7.00 Yeslc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/7/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/7/CPU0 8-10GBE 0.80 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/8/SP 40G-MSC 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/8/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/8/0 SPA-4XOC3-POS 1.0 spa fpga1 0 3.04 No--------------------------------------------------------------------------------2/8/2 SPA-4XOC3-POS 1.0 spa fpga1 2 3.04 No--------------------------------------------------------------------------------2/8/3 SPA-4XOC3-POS 1.0 spa fpga1 3 3.04 No--------------------------------------------------------------------------------2/8/4 SPA-8XOC12-POS 1.0 spa fpga1 4 1.00 No--------------------------------------------------------------------------------2/8/5 SPA-4XOC3-POS 1.0 spa fpga1 5 3.04 No--------------------------------------------------------------------------------2/9/SP MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/9/CPU0 MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/10/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/10/CPU0 8-10GBE 0.80 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/11/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/11/CPU0 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/12/SP 40G-MSC 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/12/CPU0 OC48-POS-16-ED 0.80 lc fpga1 0 9.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/13/SP MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/13/CPU0 CRS1-SIP-800 0.136 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/13/0 SPA-8X1GE 2.2 spa fpga1 0 1.08 No--------------------------------------------------------------------------------2/13/1 SPA-8X1GE-V2 1.0 spa fpga1 1 1.10 No--------------------------------------------------------------------------------2/14/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/14/CPU0 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/15/SP MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/15/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/RP0/CPU0 PRP N/A lc rommonA 0 2.03 No--------------------------------------------------------------------------------2/RP0/CPU0 PRP N/A lc rommon 1 2.04 No--------------------------------------------------------------------------------2/RP0/CPU0 PRP 7.0 lc fpga1 2 7.00 No--------------------------------------------------------------------------------2/RP0/CPU0 PRP N/A lc fpga2 3 0.01 No--------------------------------------------------------------------------------2/RP0/CPU0 PRP 13.0 lc fpga3 4 13.00 No--------------------------------------------------------------------------------2/RP0/CPU0 PRP N/A lc fpga4 5 0.01 No--------------------------------------------------------------------------------2/RP0/CPU0 PRP N/A lc fpga5 6 0.01 No--------------------------------------------------------------------------------2/RP1/CPU0 PRP N/A lc rommonA 0 2.03 No--------------------------------------------------------------------------------2/RP1/CPU0 PRP N/A lc rommon 1 2.04 No--------------------------------------------------------------------------------2/RP1/CPU0 PRP 7.0 lc fpga1 2 7.00 No--------------------------------------------------------------------------------2/RP1/CPU0 PRP N/A lc fpga2 3 0.01 No--------------------------------------------------------------------------------2/RP1/CPU0 PRP 13.0 lc fpga3 4 13.00 No--------------------------------------------------------------------------------2/RP1/CPU0 PRP N/A lc fpga4 5 0.01 No--------------------------------------------------------------------------------2/RP1/CPU0 PRP N/A lc fpga5 6 0.01 No--------------------------------------------------------------------------------2/FC0/SP CRS-16-LCC-FAN-CT 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/FC1/SP CRS-16-LCC-FAN-CT 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/AM0/SP CRS-16-ALARM 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/SM0/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/SM1/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/SM2/SP S1S3 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/SM3/SP S1S3 N/A lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/SM4/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------2/SM5/SP S1S3 0.5 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/0/SP 40G-MSC 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/0/CPU0 CRS1-SIP-800 0.136 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/0/0 SPA-8XOC12-POS 1.0 spa fpga1 0 1.00 No--------------------------------------------------------------------------------3/0/1 SPA-8XOC12-POS 1.0 spa fpga1 1 1.00 No--------------------------------------------------------------------------------3/0/3 SPA-8X1GE 2.2 spa fpga1 3 1.08 No--------------------------------------------------------------------------------3/1/SP 40G-MSC 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/1/CPU0 8-10GBE 0.96 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/2/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/2/CPU0 CRS1-SIP-800 0.2 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/2/0 SPA-10X1GE-V2 1.1 spa fpga1 0 1.10 No--------------------------------------------------------------------------------3/2/1 SPA-1X10GE-L-V2 1.2 spa fpga1 1 1.11 No--------------------------------------------------------------------------------3/2/2 SPA-10X1GE-V2 1.2 spa fpga1 2 1.10 No--------------------------------------------------------------------------------3/2/4 SPA-1X10GE-WL-V2 1.0 spa fpga1 4 1.11 No--------------------------------------------------------------------------------3/3/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/3/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/3/0 SPA-OC192POS-XFP 2.4 spa fpga1 0 1.02 No--------------------------------------------------------------------------------3/3/2 SPA-OC192POS-XFP 2.4 spa fpga1 2 1.02 No--------------------------------------------------------------------------------3/3/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------3/4/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/4/CPU0 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/5/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/5/CPU0 CRS1-SIP-800 0.104 lc fpga 0 5.00* Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/5/0 SPA-1X10GE-WL-V2 1.0 spa fpga1 0 1.11 No--------------------------------------------------------------------------------3/5/2 SPA-4XOC48POS/RPR 1.0 spa fpga1 2 1.00 No--------------------------------------------------------------------------------3/5/3 SPA-4XOC48POS/RPR 1.0 spa fpga1 3 1.00 No--------------------------------------------------------------------------------3/5/5 SPA-1X10GE-WL-V2 1.0 spa fpga1 5 1.11 No--------------------------------------------------------------------------------3/6/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/6/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/7/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/7/CPU0 8-10GBE 0.80 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/8/SP 40G-MSC 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/8/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/8/0 SPA-4XOC3-POS 1.0 spa fpga1 0 3.04 No--------------------------------------------------------------------------------3/8/1 SPA-8XOC12-POS 1.0 spa fpga1 1 1.00 No--------------------------------------------------------------------------------3/8/2 SPA-4XOC3-POS 1.0 spa fpga1 2 3.04 No--------------------------------------------------------------------------------3/8/3 SPA-4XOC3-POS 1.0 spa fpga1 3 3.04 No--------------------------------------------------------------------------------3/8/4 SPA-8XOC12-POS 1.0 spa fpga1 4 1.00 No--------------------------------------------------------------------------------3/8/5 SPA-4XOC3-POS 1.0 spa fpga1 5 3.04 No--------------------------------------------------------------------------------3/9/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/9/CPU0 MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/10/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/10/CPU0 8-10GBE 0.96 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/11/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/11/CPU0 MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/12/SP MSC_B 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/12/CPU0 OC48-POS-16-ED 0.80 lc fpga1 0 9.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/13/SP 40G-MSC 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/13/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/13/0 SPA-8X1GE-V2 1.1 spa fpga1 0 1.10 No--------------------------------------------------------------------------------3/13/1 SPA-8X1GE 2.2 spa fpga1 1 1.08 No--------------------------------------------------------------------------------3/14/SP 40G-MSC 0.9 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/14/CPU0 1OC768-ITU/C 0.1 lc fpga2 0 110.10 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/15/SP MSC_B 0.6 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/15/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/RP0/CPU0 PRP N/A lc rommonA 0 2.03 No--------------------------------------------------------------------------------3/RP0/CPU0 PRP N/A lc rommon 1 2.04 No--------------------------------------------------------------------------------3/RP0/CPU0 PRP 7.0 lc fpga1 2 7.00 No--------------------------------------------------------------------------------3/RP0/CPU0 PRP N/A lc fpga2 3 0.01 No--------------------------------------------------------------------------------3/RP0/CPU0 PRP 13.0 lc fpga3 4 13.00 No--------------------------------------------------------------------------------3/RP0/CPU0 PRP N/A lc fpga4 5 0.01 No--------------------------------------------------------------------------------3/RP0/CPU0 PRP N/A lc fpga5 6 0.01 No--------------------------------------------------------------------------------3/RP1/CPU0 PRP N/A lc rommonA 0 2.03 No--------------------------------------------------------------------------------3/RP1/CPU0 PRP N/A lc rommon 1 2.04 No--------------------------------------------------------------------------------3/RP1/CPU0 PRP 7.0 lc fpga1 2 7.00 No--------------------------------------------------------------------------------3/RP1/CPU0 PRP N/A lc fpga2 3 0.01 No--------------------------------------------------------------------------------3/RP1/CPU0 PRP 13.0 lc fpga3 4 13.00 No--------------------------------------------------------------------------------3/RP1/CPU0 PRP N/A lc fpga4 5 0.01 No--------------------------------------------------------------------------------3/RP1/CPU0 PRP N/A lc fpga5 6 0.01 No--------------------------------------------------------------------------------3/FC0/SP CRS-16-LCC-FAN-CT 0.3 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/FC1/SP CRS-16-LCC-FAN-CT 0.4 lc rommonA 0 2.04 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/AM0/SP CRS-16-ALARM 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/AM1/SP CRS-16-ALARM 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/SM0/SP S1S3 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/SM1/SP S1S3 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/SM2/SP S1S3 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/SM3/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/SM4/SP S1S3 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------3/SM5/SP S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/0/SP 40G-MSC 0.8 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/0/CPU0 8-10GBE 0.96 lc fpga1 0 10.00 Nolc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/1/SP 40G-MSC 0.2 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/1/CPU0 CRS1-SIP-800 0.96 lc fpga1 0 6.00 Nolc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/1/1 SPA-8X1GE-V2 1.1 spa fpga1 1 1.10 No--------------------------------------------------------------------------------4/1/2 SPA-8X1GE-V2 1.1 spa fpga1 2 1.10 No--------------------------------------------------------------------------------4/1/3 SPA-8X1GE-V2 1.1 spa fpga1 3 1.10 No--------------------------------------------------------------------------------4/1/4 SPA-8X1GE-V2 1.1 spa fpga1 4 1.10 No--------------------------------------------------------------------------------4/1/5 SPA-1X10GE-L-V2 1.1 spa fpga1 5 1.11 No--------------------------------------------------------------------------------4/2/SP 40G-MSC 0.6 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/2/CPU0 8-10GBE 0.112 lc fpga1 0 10.00 Nolc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/3/SP 40G-MSC 0.8 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/3/CPU0 CRS1-SIP-800 0.96 lc fpga1 0 6.00 Nolc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/3/0 SPA-8X1GE 2.2 spa fpga1 0 1.08 No--------------------------------------------------------------------------------4/3/1 SPA-8X1GE-V2 1.1 spa fpga1 1 1.10 No--------------------------------------------------------------------------------4/3/2 SPA-8X1GE-V2 1.1 spa fpga1 2 1.10 No--------------------------------------------------------------------------------4/3/3 SPA-8X1GE-V2 1.1 spa fpga1 3 1.10 No--------------------------------------------------------------------------------4/3/4 SPA-8X1GE-V2 1.1 spa fpga1 4 1.10 No--------------------------------------------------------------------------------4/3/5 SPA-8X1GE-V2 1.1 spa fpga1 5 1.10 No--------------------------------------------------------------------------------4/4/SP 40G-MSC 0.4 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/4/CPU0 CRS1-SIP-800 0.88 lc fpga1 0 6.00 Nolc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/4/0 SPA-8X1GE 2.2 spa fpga1 0 1.08 No--------------------------------------------------------------------------------4/4/1 SPA-8X1GE 2.2 spa fpga1 1 1.08 No--------------------------------------------------------------------------------4/4/2 SPA-8X1GE-V2 1.1 spa fpga1 2 1.10 No--------------------------------------------------------------------------------4/4/3 SPA-8X1GE-V2 1.1 spa fpga1 3 1.10 No--------------------------------------------------------------------------------4/4/4 SPA-8X1GE-V2 1.1 spa fpga1 4 1.10 No--------------------------------------------------------------------------------4/4/5 SPA-1X10GE-L-V2 1.2 spa fpga1 5 1.11 No--------------------------------------------------------------------------------4/5/SP 40G-MSC 0.9 lc rommonA 0 2.04 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/5/CPU0 8-10GBE 0.96 lc fpga1 0 10.00 Nolc rommonA 0 2.04 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/6/SP 40G-MSC 0.8 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/6/CPU0 CRS1-SIP-800 0.88 lc fpga1 0 6.00 Nolc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/6/0 SPA-8X1GE-V2 1.1 spa fpga1 0 1.10 No--------------------------------------------------------------------------------4/6/2 SPA-8X1GE-V2 1.1 spa fpga1 2 1.10 No--------------------------------------------------------------------------------4/6/3 SPA-8X1GE-V2 1.1 spa fpga1 3 1.10 No--------------------------------------------------------------------------------4/6/5 SPA-8X1GE 2.2 spa fpga1 5 1.08 No--------------------------------------------------------------------------------4/7/SP MSC_B 0.6 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/7/CPU0 8-10GBE 0.80 lc fpga1 0 10.00 Nolc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/8/SP 40G-MSC 0.6 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/8/CPU0 8-10GBE 0.81 lc fpga1 0 10.00 Nolc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/9/SP 40G-MSC 0.6 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/9/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/11/SP 40G-MSC 0.6 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/11/CPU0 CRS1-SIP-800 0.112 lc fpga1 0 6.00 Nolc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/11/0 SPA-OC192POS-XFP 2.4 spa fpga1 0 1.02 No--------------------------------------------------------------------------------4/11/2 SPA-8X1GE-V2 1.1 spa fpga1 2 1.10 No--------------------------------------------------------------------------------4/11/3 SPA-8X1GE 2.2 spa fpga1 3 1.08 No--------------------------------------------------------------------------------4/11/5 SPA-OC192POS-XFP 2.5 spa fpga1 5 1.02 No--------------------------------------------------------------------------------4/12/SP MSC_B 0.6 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/12/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/13/SP MSC_B 0.7 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/13/CPU0 8-10GBE 0.1 lc fpga1 0 7.00 Yeslc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/14/SP MSC_B 0.7 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/14/CPU0 CRS1-SIP-800 0.104 lc fpga1 0 6.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/15/SP MSC_B 0.7 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/15/CPU0 8-10GBE 0.80 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/RP0/CPU0 PRP N/A lc rommonA 0 2.03 No--------------------------------------------------------------------------------4/RP0/CPU0 PRP N/A lc rommon 1 2.04 No--------------------------------------------------------------------------------4/RP0/CPU0 PRP 7.0 lc fpga1 2 7.00 No--------------------------------------------------------------------------------4/RP0/CPU0 PRP N/A lc fpga2 3 0.01 No--------------------------------------------------------------------------------4/RP0/CPU0 PRP 13.0 lc fpga3 4 13.00 No--------------------------------------------------------------------------------4/RP0/CPU0 PRP N/A lc fpga4 5 0.01 No--------------------------------------------------------------------------------4/RP0/CPU0 PRP N/A lc fpga5 6 0.01 No--------------------------------------------------------------------------------4/RP1/CPU0 PRP N/A lc rommonA 0 2.03 No--------------------------------------------------------------------------------4/RP1/CPU0 PRP N/A lc rommon 1 2.04 No--------------------------------------------------------------------------------4/RP1/CPU0 PRP 7.0 lc fpga1 2 7.00 No--------------------------------------------------------------------------------4/RP1/CPU0 PRP N/A lc fpga2 3 0.01 No--------------------------------------------------------------------------------4/RP1/CPU0 PRP 13.0 lc fpga3 4 13.00 No--------------------------------------------------------------------------------4/RP1/CPU0 PRP N/A lc fpga4 5 0.01 No--------------------------------------------------------------------------------4/RP1/CPU0 PRP N/A lc fpga5 6 0.01 No--------------------------------------------------------------------------------4/FC0/SP CRS-16-LCC-FAN-CT 0.2 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/FC1/SP CRS-16-LCC-FAN-CT 0.2 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/AM1/SP CRS-16-ALARM 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/SM0/SP S1S3 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/SM1/SP S1S3 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/SM2/SP S1S3 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/SM3/SP S1S3 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/SM4/SP S1S3 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------4/SM5/SP S1S3 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------5/0/SP 40G-MSC 0.9 lc rommonA 0 2.04 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------5/0/CPU0 CRS1-SIP-800 0.80 lc fpga1 0 6.00 Nolc rommonA 0 2.04 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------5/1/SP 40G-MSC 0.8 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------5/1/CPU0 8-10GBE 0.80 lc fpga1 0 10.00 Nolc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------5/RP0/CPU0 PRP N/A lc rommonA 0 2.03 No--------------------------------------------------------------------------------5/RP0/CPU0 PRP N/A lc rommon 1 2.04 No--------------------------------------------------------------------------------5/RP0/CPU0 PRP 7.0 lc fpga1 2 7.00 No--------------------------------------------------------------------------------5/RP0/CPU0 PRP N/A lc fpga2 3 0.01 No--------------------------------------------------------------------------------5/RP0/CPU0 PRP 13.0 lc fpga3 4 13.00 No--------------------------------------------------------------------------------5/RP0/CPU0 PRP N/A lc fpga4 5 0.01 No--------------------------------------------------------------------------------5/RP0/CPU0 PRP N/A lc fpga5 6 0.01 No--------------------------------------------------------------------------------5/RP1/CPU0 PRP N/A lc rommonA 0 2.03 No--------------------------------------------------------------------------------5/RP1/CPU0 PRP N/A lc rommon 1 2.04 No--------------------------------------------------------------------------------5/RP1/CPU0 PRP 7.0 lc fpga1 2 7.00 No--------------------------------------------------------------------------------5/RP1/CPU0 PRP N/A lc fpga2 3 0.01 No--------------------------------------------------------------------------------5/RP1/CPU0 PRP 13.0 lc fpga3 4 13.00 No--------------------------------------------------------------------------------5/RP1/CPU0 PRP N/A lc fpga4 5 0.01 No--------------------------------------------------------------------------------5/RP1/CPU0 PRP N/A lc fpga5 6 0.01 No--------------------------------------------------------------------------------5/FC0/SP CRS-16-LCC-FAN-CT 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------5/FC1/SP CRS-16-LCC-FAN-CT 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------5/AM0/SP CRS-16-ALARM 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------5/SM0/SP 140G-S1S3 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.01 No--------------------------------------------------------------------------------5/SM1/SP 140G-S1S3 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.01 No--------------------------------------------------------------------------------5/SM2/SP 140G-S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.01 No--------------------------------------------------------------------------------5/SM3/SP 140G-S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.01 No--------------------------------------------------------------------------------5/SM4/SP 140G-S1S3 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.01 No--------------------------------------------------------------------------------5/SM5/SP S1S3 0.4 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SM0/SP S2 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM1/SP S2 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM2/SP S2 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM3/SP S2 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM4/SP S2 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM5/SP S2 0.1 lc rommonA 0 2.02 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM6/SP S2 0.1 lc rommonA 0 2.02 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM7/SP S2 0.1 lc rommonA 0 2.02 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM8/SP S2 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM9/SP S2 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM10/SP S2 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM11/SP S2 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM12/SP S2 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM13/SP S2 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM14/SP S2 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM15/SP S2 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM16/SP S2 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SM17/SP S2 0.1 lc rommonA 0 2.03 Nolc rommon 0 2.04 Nolc fpga1 0 6.04 Nolc fpga2 0 4.02 Nolc fpga3 0 5.00 No--------------------------------------------------------------------------------F0/SC0/CPU0 Shelf Controller GE22 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/SC1/CPU0 Shelf Controller GE22 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/AM1/SP CRS-16-ALARM 0.2 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/LM0/SP LED N/A lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------F0/LM1/SP CRS-FCC-LED 0.1 lc rommonA 0 2.01 Nolc rommon 0 2.04 No--------------------------------------------------------------------------------Minimum Firmware Requirement
•
After completing an RMA remember to upgrade the firmware as per this matrix:
http://www.cisco.com/web/Cisco_IOS_XR_Software/pdf/SoftwareFirmwareCompatibilityMatrix.pdf
•
Links to PDF copies of the IOS XR Firmware Upgrade Guides are available here:
http://www.cisco.com/web/Cisco_IOS_XR_Software/index.html
Here's the link to the Cisco Systems IOS XR Firmware Upgrade Guide For CRS-1 and XR12000:
http://www.cisco.com/web/Cisco_IOS_XR_Software/pdf/IOSXRFirmwareUpgradeGuide.pdf
•
Refer to the Hardware Redundancy and Node Administration Commands on Cisco IOS XR Software chapter of the Cisco IOS XR System Management Command Reference for the Cisco CRS Router for the upgrade CLI:
Determining Your Software Version
To determine the version of Cisco IOS XR software running on your router, log into the router and enter the show version command:
Cisco CRS-1 show version Output
Step 1
Establish a Telnet session with the router.
Step 2
Enter the show version command from EXEC mode.
Cisco IOS XR Software, Version 4.0.3[Default]Copyright (c) 2011 by Cisco Systems, Inc.ROM: System Bootstrap, Version 2.04(20110408:051659) [CRS ROMMON], ^Mp0 uptime is 52 minutesSystem image file is "bootflash:disk0/hfr-os-mbi-4.0.3/mbihfr-rp.vm"cisco CRS-16/S (7457) processor with 4194304K bytes of memory.7457 processor at 1197Mhz, Revision 1.2Cisco CRS Series 16 Slots Line Card Chassis12 Management Ethernet117 GigabitEthernet143 SONET/SDH143 Packet over SONET/SDH31 TenGigE1 WANPHY controller(s)1019k bytes of non-volatile configuration memory.45791M bytes of hard disk.4098996k bytes of disk0: (Sector size 512 bytes).Boot device on node 0/0/SP is bootflash:Package active on node 0/0/SP:iosxr-infra, V 4.0.3[00], Cisco Systems, at disk0:iosxr-infra-4.0.3Built on Thu May 5 19:14:36 PDT 2011By sjc-lds-834 in /auto/srcarchive5/production/4.0.3/hfr/workspace for pieiosxr-diags, V 4.0.3[00], Cisco Systems, at disk0:iosxr-diags-4.0.3Built on Thu May 5 19:16:29 PDT 2011By sjc-lds-834 in /auto/srcarchive5/production/4.0.3/hfr/workspace for pie...
Cisco CRS-3 show version Output
Step 1
Establish a Telnet session with the router.
Step 2
Enter the show version command from EXEC mode.
Cisco IOS XR Software, Version 4.0.3[Default]Copyright (c) 2011 by Cisco Systems, Inc.ROM: System Bootstrap, Version 2.04(20110407:225207) [CRS ROMMON], ^MCORE-1 uptime is 45 minutesSystem image file is "disk0:hfr-os-mbi-4.0.3/0x100008/mbihfr-rp-x86e.vm"cisco CRS-16/S (Intel 686 F6M14S4) processor with 12582912K bytes of memory.Intel 686 F6M14S4 processor at 2128Mhz, Revision 2.174Cisco CRS Series 16 Slots Line Card Chassis12 Management Ethernet186 TenGigE13 WANPHY controller(s)344 GigabitEthernet342 SONET/SDH342 Packet over SONET/SDH1 DWDM controller(s)1019k bytes of non-volatile configuration memory.14712M bytes of hard disk.10449904k bytes of disk0: (Sector size 512 bytes).10449904k bytes of disk1: (Sector size 512 bytes).Boot device on node 0/0/SP is bootflash:Package active on node 0/0/SP:iosxr-infra, V 4.0.3[00], Cisco Systems, at disk0:iosxr-infra-4.0.3Built on Thu May 5 22:53:15 PDT 2011By sjc-lds-834 in /auto/srcarchive5/production/4.0.3/hfr/workspace for pieiosxr-diags, V 4.0.3[00], Cisco Systems, at disk0:iosxr-diags-4.0.3Built on Thu May 5 22:56:11 PDT 2011By sjc-lds-834 in /auto/srcarchive5/production/4.0.3/hfr/workspace for pie...
New Cisco CRS Router-Specific Software Features
The following new software features were introduced in Cisco IOS XR Software Release 4.0.3 on the Cisco CRS platform:
•
Online Diagnostics Enhancements
•
Filters for ISIS Overload Bit
•
CRS Reliability Command Feature
Note
Cisco Session Border Controller (SBC) is not supported on any platform in Cisco IOS XR Software Release 4.0.3. Cisco IOS XR Software Release 3.7 is the last release that supports SBC.
Online Diagnostics Enhancements
Cisco IOS XR Software Release 4.0.3 includes the following enhancements to online diagnostics:
•
FabSRCC Test on Cisco CRS-3 Line Cards
FabricUcastMcast Test
The FabricUcastMcast diagnostic test was introduced in Cisco IOS XR Software Release 4.0.3. This test combines the unicast test, FabricDiagnosisTest, and the multicast test, FabricMcastTest and replaces them as the test that is enabled in the health monitoring by default. The FabricDiagnosisTest and FabricMcastTest are no longer turned on by default as part of the health monitoring, however they are still available.
The default interval for invoking FabricUcastMcastTest as part of the health monitoring is set to 1 min. In previous releases, the interval of FabricDiagnosisTest and FabricMcastTest was set to 2 min.
By default, the FabricUcastMcastTest is enabled on the DSC standby RP. If the standby RP is not available, the test runs from the active RP.
FabricUcastMcastTest includes the automatic plane disabling (APD) feature, in which a request is made to take the faulty fabric plane out-of-service. The APD rules for making the plane out-of-service (OOS) request by the online-diags require either one of the following to be true for the tested plane:
•
50% or more (and at least 3) nodes failed to respond to the ping test.
•
100% (and at least 2) nodes of a given fabric group failed to respond to the ping test. The test enforces 0% tolerance for ping packet loss or corruption.
The request to take a faulty fabric plane out-of-service is fulfilled when the fabric capacity threshold is met. The default threshold setting is 7. However, you can configure the fabric capacity threshold by using the following command:
RP/0/RP0/CPU0:router(admin-config)#controllers fabric capacity threshold <2-8>The threshold parameter is in the range 2 through 8.
Use the show diagnostic result command in admin exec mode to view the results of the FabricUcastMcast Test. See the following example:
RP/1/RP0/CPU0:router(admin)#show diagnostic result location 0/rp1/cpu0 test FabricUcastMcastTest detailFri Mar 4 11:21:01.153 UTCCurrent bootup diagnostic level for RP 0/RP1/CPU0: bypassTest results: (. = Pass, F = Fail, U = Untested)___________________________________________________________________________13 ) FabricUcastMcastTest ------------> .Error code ------------------> 0 (DIAG_SUCCESS)Total run count -------------> 17Last test execution time ----> Fri Mar 4 11:20:54 2011First test failure time -----> Fri Mar 4 11:19:47 2011Last test failure time ------> Fri Mar 4 11:19:47 2011Last test pass time ---------> Fri Mar 4 11:20:54 2011Total failure count ---------> 1Consecutive failure count ---> 0Unicast Resultsdest: (all nodes) session_id: 48ret_code: 0 (No error)rx_ret_code: 0 (No error)tx_ret_code: 0 (No error)min_rtt_ms: 2 max_rtt_ms: 63ping_mode_mask: 0x00000099 fplane_bitmap: 0x000000ffinter_packet_delay: 0 max_timeout_ms: 1500late_timeout_ms: 1500 priority: 0flags: 0x00000000 pkt_cnt: 10pkt_size: 1000 num_nodes: 15tx_start_ts: 11:20:54.488 UTC Fri Mar 04 2011modes: 0 - LP/fabricq0, 3 - LP/fabricq1, 4 - HP/fabricq0, 7 - HP/fabricq1node[mode] req'ed rx_good tx_good tx_unrea tx_err rx_unexp rx_corr============== ======== ======== ======== ======== ======== ======== ========0/0/CPU0[0] 10 10 10 0 0 0 00/0/CPU0[3] 10 10 10 0 0 0 00/0/CPU0[4] 10 10 10 0 0 0 00/0/CPU0[7] 10 10 10 0 0 0 00/4/CPU0[0] 10 10 10 0 0 0 00/4/CPU0[3] 10 10 10 0 0 0 00/4/CPU0[4] 10 10 10 0 0 0 00/4/CPU0[7] 10 10 10 0 0 0 00/5/CPU0[0] 10 10 10 0 0 0 00/5/CPU0[3] 10 10 10 0 0 0 00/5/CPU0[4] 10 10 10 0 0 0 00/5/CPU0[7] 10 10 10 0 0 0 00/6/CPU0[0] 10 10 10 0 0 0 00/6/CPU0[3] 10 10 10 0 0 0 00/6/CPU0[4] 10 10 10 0 0 0 00/6/CPU0[7] 10 10 10 0 0 0 00/8/CPU0[0] 10 10 10 0 0 0 00/8/CPU0[4] 10 10 10 0 0 0 00/RP0/CPU0[0] 10 10 10 0 0 0 00/RP0/CPU0[4] 10 10 10 0 0 0 00/RP1/CPU0[0] 10 10 10 0 0 0 00/RP1/CPU0[4] 10 10 10 0 0 0 01/3/CPU0[0] 10 10 10 0 0 0 01/3/CPU0[3] 10 10 10 0 0 0 01/3/CPU0[4] 10 10 10 0 0 0 01/3/CPU0[7] 10 10 10 0 0 0 01/4/CPU0[0] 10 10 10 0 0 0 01/4/CPU0[3] 10 10 10 0 0 0 01/4/CPU0[4] 10 10 10 0 0 0 01/4/CPU0[7] 10 10 10 0 0 0 01/7/CPU0[0] 10 10 10 0 0 0 01/7/CPU0[4] 10 10 10 0 0 0 01/9/CPU0[0] 10 10 10 0 0 0 01/9/CPU0[3] 10 10 10 0 0 0 01/9/CPU0[4] 10 10 10 0 0 0 01/9/CPU0[7] 10 10 10 0 0 0 01/14/CPU0[0] 10 10 10 0 0 0 01/14/CPU0[3] 10 10 10 0 0 0 01/14/CPU0[4] 10 10 10 0 0 0 01/14/CPU0[7] 10 10 10 0 0 0 01/15/CPU0[0] 10 10 10 0 0 0 01/15/CPU0[4] 10 10 10 0 0 0 01/RP0/CPU0[0] 10 10 10 0 0 0 01/RP0/CPU0[4] 10 10 10 0 0 0 01/RP1/CPU0[0] 10 10 10 0 0 0 01/RP1/CPU0[4] 10 10 10 0 0 0 0============== ======== ======== ======== ======== ======== ======== ========Global 460 460 460 0 0 0 0Unicast Results (Last Failure)dest: (all nodes) session_id: 30ret_code: 606182912 ('FAB_SVR' detected the 'informational' condition 'Timed outwaiting for all ping replies.')rx_ret_code: 0 (No error)tx_ret_code: 0 (No error)min_rtt_ms: 2 max_rtt_ms: 61ping_mode_mask: 0x00000099 fplane_bitmap: 0x000000ffinter_packet_delay: 0 max_timeout_ms: 1500late_timeout_ms: 1500 priority: 0flags: 0x00000000 pkt_cnt: 10pkt_size: 1000 num_nodes: 15tx_start_ts: 11:19:47.167 UTC Fri Mar 04 2011modes: 0 - LP/fabricq0, 3 - LP/fabricq1, 4 - HP/fabricq0, 7 - HP/fabricq1node[mode] req'ed rx_good tx_good tx_unrea tx_err rx_unexp rx_corr============== ======== ======== ======== ======== ======== ======== ========0/0/CPU0[0] 10 0 10 0 0 0 00/0/CPU0[3] 10 0 10 0 0 0 00/0/CPU0[4] 10 0 10 0 0 0 00/0/CPU0[7] 10 0 10 0 0 0 00/4/CPU0[0] 10 10 10 0 0 0 00/4/CPU0[3] 10 10 10 0 0 0 00/4/CPU0[4] 10 10 10 0 0 0 00/4/CPU0[7] 10 10 10 0 0 0 00/5/CPU0[0] 10 10 10 0 0 0 00/5/CPU0[3] 10 10 10 0 0 0 00/5/CPU0[4] 10 10 10 0 0 0 00/5/CPU0[7] 10 10 10 0 0 0 00/6/CPU0[0] 10 10 10 0 0 0 00/6/CPU0[3] 10 10 10 0 0 0 00/6/CPU0[4] 10 10 10 0 0 0 00/6/CPU0[7] 10 10 10 0 0 0 00/8/CPU0[0] 10 10 10 0 0 0 00/8/CPU0[4] 10 10 10 0 0 0 00/RP0/CPU0[0] 10 10 10 0 0 0 00/RP0/CPU0[4] 10 10 10 0 0 0 00/RP1/CPU0[0] 10 10 10 0 0 0 00/RP1/CPU0[4] 10 10 10 0 0 0 01/3/CPU0[0] 10 10 10 0 0 0 01/3/CPU0[3] 10 10 10 0 0 0 01/3/CPU0[4] 10 10 10 0 0 0 01/3/CPU0[7] 10 10 10 0 0 0 01/4/CPU0[0] 10 10 10 0 0 0 01/4/CPU0[3] 10 10 10 0 0 0 01/4/CPU0[4] 10 10 10 0 0 0 01/4/CPU0[7] 10 10 10 0 0 0 01/7/CPU0[0] 10 10 10 0 0 0 01/7/CPU0[4] 10 10 10 0 0 0 01/9/CPU0[0] 10 10 10 0 0 0 01/9/CPU0[3] 10 10 10 0 0 0 01/9/CPU0[4] 10 10 10 0 0 0 01/9/CPU0[7] 10 10 10 0 0 0 01/14/CPU0[0] 10 10 10 0 0 0 01/14/CPU0[3] 10 10 10 0 0 0 01/14/CPU0[4] 10 10 10 0 0 0 01/14/CPU0[7] 10 10 10 0 0 0 01/15/CPU0[0] 10 10 10 0 0 0 01/15/CPU0[4] 10 10 10 0 0 0 01/RP0/CPU0[0] 10 10 10 0 0 0 01/RP0/CPU0[4] 10 10 10 0 0 0 01/RP1/CPU0[0] 10 10 10 0 0 0 01/RP1/CPU0[4] 10 10 10 0 0 0 0============== ======== ======== ======== ======== ======== ======== ========Global 460 420 460 0 0 0 0Multicast Resultsdest: FGID 1023 session_id: 49ret_code: 0 (No error)rx_ret_code: 0 (No error)tx_ret_code: 0 (No error)min_rtt_ms: 13 max_rtt_ms: 58ping_mode_mask: 0x00000011 fplane_bitmap: 0x000000ffinter_packet_delay: 0 max_timeout_ms: 1500late_timeout_ms: 1500 priority: 0flags: 0x00000000 pkt_cnt: 10pkt_size: 1000 num_nodes: 15tx_start_ts: 11:20:54.492 UTC Fri Mar 04 2011modes: 0 - LP/fabricq0, 4 - HP/fabricq0node[mode] req'ed rx_good tx_good tx_unrea tx_err rx_unexp rx_corr============== ======== ======== ======== ======== ======== ======== ========0/0/CPU0[0] 10 10 10 0 0 0 00/0/CPU0[4] 10 10 10 0 0 0 00/4/CPU0[0] 10 10 10 0 0 0 00/4/CPU0[4] 10 10 10 0 0 0 00/5/CPU0[0] 10 10 10 0 0 0 00/5/CPU0[4] 10 10 10 0 0 0 00/6/CPU0[0] 10 10 10 0 0 0 00/6/CPU0[4] 10 10 10 0 0 0 00/8/CPU0[0] 10 10 10 0 0 0 00/8/CPU0[4] 10 10 10 0 0 0 00/RP0/CPU0[0] 10 10 10 0 0 0 00/RP0/CPU0[4] 10 10 10 0 0 0 00/RP1/CPU0[0] 10 10 10 0 0 0 00/RP1/CPU0[4] 10 10 10 0 0 0 01/3/CPU0[0] 10 10 10 0 0 0 01/3/CPU0[4] 10 10 10 0 0 0 01/4/CPU0[0] 10 10 10 0 0 0 01/4/CPU0[4] 10 10 10 0 0 0 01/7/CPU0[0] 10 10 10 0 0 0 01/7/CPU0[4] 10 10 10 0 0 0 01/9/CPU0[0] 10 10 10 0 0 0 01/9/CPU0[4] 10 10 10 0 0 0 01/14/CPU0[0] 10 10 10 0 0 0 01/14/CPU0[4] 10 10 10 0 0 0 01/15/CPU0[0] 10 10 10 0 0 0 01/15/CPU0[4] 10 10 10 0 0 0 01/RP0/CPU0[0] 10 10 10 0 0 0 01/RP0/CPU0[4] 10 10 10 0 0 0 01/RP1/CPU0[0] 10 10 10 0 0 0 01/RP1/CPU0[4] 10 10 10 0 0 0 0============== ======== ======== ======== ======== ======== ======== ========Global 300 300 300 0 0 0 0Multicast Results (Last Failure)dest: FGID 1023 session_id: 31ret_code: 0 (No error)rx_ret_code: 0 (No error)tx_ret_code: 0 (No error)min_rtt_ms: 14 max_rtt_ms: 58ping_mode_mask: 0x00000011 fplane_bitmap: 0x000000ffinter_packet_delay: 0 max_timeout_ms: 1500late_timeout_ms: 1500 priority: 0flags: 0x00000000 pkt_cnt: 10pkt_size: 1000 num_nodes: 15tx_start_ts: 11:19:47.171 UTC Fri Mar 04 2011modes: 0 - LP/fabricq0, 4 - HP/fabricq0node[mode] req'ed rx_good tx_good tx_unrea tx_err rx_unexp rx_corr============== ======== ======== ======== ======== ======== ======== ========0/0/CPU0[0] 10 10 10 0 0 0 00/0/CPU0[4] 10 10 10 0 0 0 00/4/CPU0[0] 10 10 10 0 0 0 00/4/CPU0[4] 10 10 10 0 0 0 00/5/CPU0[0] 10 10 10 0 0 0 00/5/CPU0[4] 10 10 10 0 0 0 00/6/CPU0[0] 10 10 10 0 0 0 00/6/CPU0[4] 10 10 10 0 0 0 00/8/CPU0[0] 10 10 10 0 0 0 00/8/CPU0[4] 10 10 10 0 0 0 00/RP0/CPU0[0] 10 10 10 0 0 0 00/RP0/CPU0[4] 10 10 10 0 0 0 00/RP1/CPU0[0] 10 10 10 0 0 0 00/RP1/CPU0[4] 10 10 10 0 0 0 01/3/CPU0[0] 10 10 10 0 0 0 01/3/CPU0[4] 10 10 10 0 0 0 01/4/CPU0[0] 10 10 10 0 0 0 01/4/CPU0[4] 10 10 10 0 0 0 01/7/CPU0[0] 10 10 10 0 0 0 01/7/CPU0[4] 10 10 10 0 0 0 01/9/CPU0[0] 10 10 10 0 0 0 01/9/CPU0[4] 10 10 10 0 0 0 01/14/CPU0[0] 10 10 10 0 0 0 01/14/CPU0[4] 10 10 10 0 0 0 01/15/CPU0[0] 10 10 10 0 0 0 01/15/CPU0[4] 10 10 10 0 0 0 01/RP0/CPU0[0] 10 10 10 0 0 0 01/RP0/CPU0[4] 10 10 10 0 0 0 01/RP1/CPU0[0] 10 10 10 0 0 0 01/RP1/CPU0[4] 10 10 10 0 0 0 0============== ======== ======== ======== ======== ======== ======== ========Global 300 300 300 0 0 0 0The show diagnostic content location command has been modified to support the new FabricUcastMcast Test. See the following example:
RP/0/RP0/CPU0:router(admin)#show diagnostic content location 0/0/CPU0Thu Mar 3 13:45:26.115 PSTDRP 0/0/CPU0:Diagnostics test suite attributes:M/C/* - Minimal bootup level test / Complete bootup level test / NAB/* - Basic ondemand test / NAP/V/* - Per port test / Per device test / NAD/N/* - Disruptive test / Non-disruptive test / NAS/* - Only applicable to standby unit / NAX/* - Not a health monitoring test / NAF/* - Fixed monitoring interval test / NAE/* - Always enabled monitoring test / NAA/I - Monitoring is active / Monitoring is inactiveTest Interval Thre-ID Test Name Attributes (day hh:mm:ss.ms shold)==== ================================== ============ ================= =====1) ControlEthernetPingTest ---------> *B*N*X**I 001 00:00:00.000 12) SelfPingOverFabric --------------> *B*N*X**I 001 00:00:00.000 13) FabricPingTest ------------------> *B*N*X**I 001 00:00:00.000 14) ControlEthernetInactiveLinkTest -> *B*NS***I 001 00:00:00.000 15) RommonRevision ------------------> *B*N*X**I 001 00:00:00.000 16) FabricDiagnosisTest ------------> *B*NS***I 000 00:02:00.000 17) FilesystemBasicDisk0 ------------> *B*N****I 003 00:00:00.000 18) FilesystemBasicDisk1 ------------> *B*N****I 003 00:00:00.000 19) FilesystemBasicHarddisk ---------> *B*N****I 003 00:00:00.000 110) ScratchRegisterTest -------------> CBVN****I 001 00:00:00.000 111) FabricMcastTest -----------------> *B*NS***A 000 00:02:00.000 112) ControlEthernetIntraSwitchTest --> ***N****I 000 00:00:02.000 313) FabricUcastMcastTest ------------> *B*N****A 000 00:01:00.000 1The FabricUcastMcastTest diagnostic test is used to periodically verify the fabric connectivity to all fabric destinations (RP, LC, DRP nodes) in a single or multi-chassis system.
Automatic reload and shutdown as a result of a single -node failure is disabled by default. To enable this feature, set the parameters of the FabricUcastMcast test by setting one or more of the optional parameters of the diagnostic test-parameters FabricUcastMcastTest command.
diagnostic test-parameters FabricUcastMcastTest [single-DRP-node-failure | single-LC-node-failure | single-RP-node-failure] <failure-type| reload threshold | shutdown threshold>
Syntax Description
Command Default
None.
Command Modes
Admin-config FabricUcastMcastTest
Command History
Usage Guidelines
To use this command, you must be in a user group associated with a task group that includes the proper task IDs. If you suspect user group assignment is preventing you from using a command, contact your AAA administrator.
Task ID
Examples
The following example shows how to set a node for automatic reload and shutdown when the FabricUcastMcastTest results return single node failure as a result of line card failures for only multicast traffic:
RP/0/RP0/CPU0:router# adminRP/0/RP0/CPU0:router(admin)# configurationRP/0/RP0/CPU0:router(admin-config)# diagnostic test-parametersRP/0/RP0/CPU0:router(admin-config-diag-test-params)#FabricUcastMcastTestRP/0/RP0/CPU0:router(admin-config-FabricUcastMcastTest)#single-LC-node-failureRP/0/RP0/CPU0:router(admin-config-FabricUcastMcastTest-LC)failure-type multicast-onlyRP/0/RP0/CPU0:router(admin-config-FabricUcastMcastTest-LC)reload threshold 5RP/0/RP0/CPU0:router(admin-config-FabricUcastMcastTest-LC)shutdown threshold 6RP/0/RP0/CPU0:router(admin-config-FabricUcastMcastTest-LC)commitWhen a single-node failure is detected, the following syslog messages are logged:
RP/0/RP1/CPU0:Jan 27 07:58:58.364 : online_diag_rp[276]: %DIAG-XR_DIAG-3-ERROR : (U) Fabric Ping Failure, 1 of 3 nodes failed(L): 0/3/CPU0RP/0/RP1/CPU0:Jan 27 07:58:58.802 : online_diag_rp[276]: %DIAG-XR_DIAG-3-ERROR : (U) FIM: single-node failure detected - 0/3/CPU0consecutive ucast/mcast failures: 15/0When the reload threshold is reached, the following syslog message is logged prior to the reload:
RP/0/RP1/CPU0:Jan 27 07:58:58.803 : online_diag_rp[276]: %DIAG-XR_DIAG-6-INFO :reload threshold 15 crossed, reloading 0/3/CPU0When the shutdown threshold is reached, the following syslog messages are logged:
RP/0/RP1/CPU0:Jan 27 08:11:02.104 : online_diag_rp[276]: %DIAG-XR_DIAG-6-INFO : shutdown threshold 10 crossed, shutting down 0/3/CPU0RP/0/RP1/CPU0:Jan 27 08:11:02.137 : online_diag_rp[276]: %PLATFORM-SHELFMGR-6-BRINGDOWN_REQUEST_LIB : Requesting node 0/3/CPU0 to be shutdown. reason: [diag fabric ping failure]RP/0/RP0/CPU0:Jan 27 08:11:02.136 : shelfmgr[306]: %PLATFORM-SHELFMGR-6-BRINGDOWN_REQUEST : process online_diag_rp running on node0_RP1_CPU0 requested node 0/3/CPU0 to be shutdown. reason: [diag fabric ping failure]FabSRCC Test on Cisco CRS-3 Line Cards
The FabSRCC diagnostic test was introduced in Cisco IOS XR Software Release 4.0.3 on the Cisco CRS-3 line cards. This test supports CRS-3 nodes that send and receive statically routed control cells (SRCC).
Use the following command to start the SRCC Test
diagnostic start location <location> test FabSRCCTest
The <location> parameter is one of the nodes in the Run state that supports SRCC functionality.
By default the FabSRCC test is run on demand, but you can configure it to run as a health monitor test by using the following command:.
diagnostic monitor <location> test FabSRCCTest
To stop the SRCC test to run as a health monitor test, use the following command:
no diagnostic monitor <location> test FabSRCCTest
If you run the SRCC test as a health monitor, you can configure the interval by using the following command:
diagnostic monitor interval <location> test FabSRCCTest number-of-days hour:minutes:seconds. milliseconds
The default interval is 2 minutes.
The following show command has been modified to support the new FabricUcastMcast test:
•
show diagnostic content location
RP/0/RP0/CPU0:router(admin)#show diagnostic content location 0/0/CPU0RP/0/RP0/CPU0:router(admin)#show diagnostic content location 0/4/CPU0Tue Jun 1 20:59:42.924 UTCMSC-140G 0/4/CPU0:Diagnostics test suite attributes:M/C/* - Minimal bootup level test / Complete bootup level test / NAB/* - Basic ondemand test / NAP/V/* - Per port test / Per device test / NAD/N/* - Disruptive test / Non-disruptive test / NAS/* - Only applicable to standby unit / NAX/* - Not a health monitoring test / NAF/* - Fixed monitoring interval test / NAE/* - Always enabled monitoring test / NAA/I - Monitoring is active / Monitoring is inactiveTest Interval Thre-ID Test Name Attributes (day hh:mm:ss.ms shold)==== ================================== ============ ================= =====1) ControlEthernetPingTest ---------> *B*N*X**I 001 00:00:00.000 12) SelfPingOverFabric --------------> *B*N*X**I 001 00:00:00.000 13) RommonRevision ------------------> *B*N*X**I 001 00:00:00.000 14) ScratchRegisterTest -------------> CBVN****I 001 00:00:00.000 15) PSEMemoryBISTTest ---------------> **VD*X**I 001 00:00:00.000 16) FabricqMemoryBISTTest -----------> **VD*X**I 001 00:00:00.000 17) EgressqMemoryBISTTest -----------> **VD*X**I 001 00:00:00.000 18) IngressqMemoryBISTTest ----------> **VD*X**I 001 00:00:00.000 19) FabSRCCTest --------------------> *B*N*X**I 000 00:02:00.000 1To display detailed diagnostic test results for the FabSRCC Test, use the following command:
show diagnostic result <location> test FabSRCCTest detail
RP/0/RP0/CPU0:router(admin)#show diagnostic result location 0/4/cpu0 test FabSRCCTest detailTue Jun 1 21:07:38.974 UTCCurrent bootup diagnostic level for MSC-140G 0/4/CPU0: bypassTest results: (. = Pass, F = Fail, U = Untested)___________________________________________________________________________9 ) FabSRCCTest -------------------> .Error code ------------------> 0 (DIAG_SUCCESS)Total run count -------------> 1Last test execution time ----> Tue Jun 1 21:05:00 2010First test failure time -----> n/aLast test failure time ------> n/aLast test pass time ---------> Tue Jun 1 21:05:00 2010Total failure count ---------> 0Consecutive failure count ---> 0___________________________________________________________________________Filters for ISIS Overload Bit
Cisco IOS XR Software Release 4.0.3 adds support for configuring the ignore-overload for multiple roles of the nodes in the label switched path (LSP). The following optional arguments were added to the path-selection ignore overload command:
•
head
•
mid
•
tail
See the modified path-selection ignore overload (MPLS-TE) Command description. The default of this command is to ignore the overload for all of the roles.
You can configure one or more roles of the LSP to ignore the overload. To show the ignore overload configuration, use the show run mpls traffic-eng command. The following example shows how to configure the tail of the LSP to ignore the overload:
RP/0/RP0/CPU0:router# configureRP/0/RP0/CPU0:router(config)# mpls traffic-engRP/0/RP0/CPU0:router(config-mpls-te)# path-selection overload ignore tailRP/0/RP0/CPU0:router(config-mpls-te)# commitRP/0/RP0/CPU0:router# show run mpls traffic-engThu Mar 3 09:50:56.071 PSTmpls traffic-enginterface POS0/2/0/0bfd fast-detect!interface POS0/2/0/1bfd fast-detect!interface TenGigE0/2/2/0bfd fast-detect!interface TenGigE0/2/5/0bfd fast-detect!interface GigabitEthernet0/2/3/0bfd fast-detect!interface GigabitEthernet0/2/3/2bfd fast-detect!!path-selection ignore overload tailpath-selection ignore overload (MPLS-TE) Command
To ignore the Intermediate System-to-Intermediate System (IS-IS) overload bit setting for MPLS-TE, use the path-selection ignore overload command in MPLS-TE configuration mode. To return to the default behavior, use the no form of this command.
path-selection ignore overload [head|mid|tail]
no path-selection ignore overload
Syntax Description
Command Default
Overload is ignored on all node roles in the LSP.
Command Modes
MPLS-TE configuration
Command History
Usage Guidelines
To use this command, you must be in a user group associated with a task group that includes the proper task IDs. If you suspect user group assignment is preventing you from using a command, contact your AAA administrator.
Use the path-selection ignore overload command to ensure that label switched paths (LSPs) are broken because of routers whose IS-IS overload bit is enabled.
Task ID
Examples
The following example shows how to use the path-selection ignore overload command to ignore the overload for all of the nodes:
RP/0/RP0/CPU0:router# configureRP/0/RP0/CPU0:router(config)# mpls traffic-engRP/0/RP0/CPU0:router(config-mpls-te)# path-selection overload ignoreRP/0/RP0/CPU0:router(config-mpls-te)# commitThe following example show how to configure the tail of the LSP to ignore the overload:
RP/0/RP0/CPU0:router# configureRP/0/RP0/CPU0:router(config)# mpls traffic-engRP/0/RP0/CPU0:router(config-mpls-te)# path-selection overload ignore tailRP/0/RP0/CPU0:router(config-mpls-te)# commitCRS Reliability Command Feature
The following new CRS reliability command software features were introduced in Cisco IOS XR Software Release 4.0.3 on the Cisco CRS platform:
•
"Configurable ASIC Reset Threshold Feature" on page 55
•
"Configurable MSC/Fabric Board Reload Threshold Feature" on page 56
Configurable ASIC Reset Threshold Feature
Cisco IOS XR Software Release 4.0.3 introduces support for the Configurable ASIC Reset Threshold feature on the Cisco CRS platform.
Prior to Cisco IOS XR Software Release 4.0.3, the ASIC drivers log a critical fault to the fault manager, triggering it to reload a node when any ASIC onboard has reset 5 times within a certain time. This feature makes the reset threshold configurable. The range is 1 to 5 resets within a certain time.
Note
There is no change in the mechanism of how the reload is triggered. For example, if reload is prevented for the specified location by the hw-module reset auto disable loc <> command in admin-config mode, no reload happens.
•
Configurable ASIC Reset Threshold—The following commands are introduced on Cisco IOS XR Software Release 4.0.3:
–
admin config : asic <asicname> reset threshold <1..5> location <fully-qualified-location>
–
admin config : no asic <asicname> reset threshold <1..5> location <fully-qualified-location>
ASIC Reset Threshold Command Syntax
admin config : asic <asicname> reset threshold <1..5> location <fully-qualified-location>
asicname : name of the ASIC.
Numeric value after the keyword threshold : The number of resets at which the critical fault is logged by the driver. The range is 1 to 5, and the hardcoded default is 5.
Fully qualified R/S/I after the keyword location: The location where the default threshold is to be modified. For LCC nodes, the location must be a fully qualified CPU0 instance (and in addition CPU1 for DRPs). For fabric boards, the location is a fully qualified SP instance.
Limitation
Though the asic <asicname> reset threshold <1..5> location <fully-qualified-location> command is accepted for any of the ASICs listed by command help after the keyword asic, it takes effect only on the 40G generation ASICs. For others, it is a no-op and the node reloads continue to happen at the respective hard-coded thresholds.
No Version of the ASIC Reset Threshold Command Syntax
admin config : no asic <asicname> reset threshold <1..5> location <fully-qualified-location>
The "no" version of the admin config : asic <asicname> reset threshold <1..5> location <fully-qualified-location> command restores the hardcoded reset threshold default of 5.
Limitation
Currently there is no way to view the value of the default reset threshold. When the default reset threshold has been configured to a specific value using the asic <asicname> reset threshold <1..5> location <fully-qualified-location> command in admin config mode, you can execute the show run | include asic command in admin mode to display the currently assigned ASIC reset thresholds.
Configurable MSC/Fabric Board Reload Threshold Feature
Cisco IOS XR Software Release 4.0.3 introduces support for the Configurable MSC/Fabric Board Reload Threshold feature on the Cisco CRS platform.
Prior to Cisco IOS XR Software Release 4.0.3, the shelfmgr keeps a count of each reload when nodes reload ungracefully (e.g., due to a fault manager critical fault). When the count matches either the hardcoded daily threshold (of 8) or the hardcoded hourly threshold (of 5), the shelfmgr moves the node into IN-RESET state and prevents the node from booting pending user intervention.
The Configurable MSC/Fabric Board Reload Threshold feature introduced in Cisco IOS XR Software Release 4.0.3 makes the two hardcoded reload thresholds (daily and hourly) configurable. The range is 1 to 8 reloads within a day and 1 to 5 reloads within an hour. Both thresholds can also be set to "nolimit". When both the hourly reload threshold and the daily reload threshold are both configured as "nolimit", the node endlessly keeps coming up, never going into IN-RESET state.
While configuring one of the two thresholds (hourly or daily), no restrictions are imposed on the relative values of the two. The node enters the IN-RESET state at the smaller of the two thresholds, either configured or default.
MSC/Fabric Board Reload Threshold Command Syntax
admin config : hw-module reset daily|hourly threshold <nolimit|number> location <all|fully-qualified-location>
While comparing the reload count to decide whether the node should be moved to IN-RESET state, first the configuration on that specific location is checked. If a configuration is present, that value is used for comparison. If no configurations for specific locations are found, the configuration for "all" locations is checked. If a configuration for "all" locations is present, that value is used. If no configurations for "all" locations are found, the hardcoded values are used as thresholds.
all : Threshold is applied on all MSC/SM locations.
Limitation
If a fully qualified location is used, you must assign a fully qualified CPU0 for LCC nodes and assign fully qualified SP locations for SM (fabric) locations.
No Version of the MSC/Fabric Board Reload Threshold Command Syntax
admin config : no hw-module reset daily|hourly threshold <nolimit|number> location <all|fully-qualified-location>
If the all parameter to the location keyword is specified, the no hw-module reset command only removes the global configuration. If there are thresholds configured for specific locations, they will continue to remain in effect until the "no" form of the hw-module reset command is configured for each one of them.
Limitation
Currently there is no way to view the value of the default reload thresholds. When the default reload thresholds have been configured to a specific value using the hw-module reset daily|hourly threshold <nolimit|number> location <all|fully-qualified-location> command in admin config mode, you can execute the show run | include hw-module reset command in admin mode to display the currently assigned reload thresholds.
Frame Relay Support
Support for Frame Relay was introduced for the following SPAs:
•
Cisco 1-Port OC-192c/STM-64 POS/RPR SPA
•
Cisco 1-Port OC-192c/STM-64 POS/RPR XFP SPA
•
Cisco 2-Port and 4-Port OC-48c/STM-16 POS SPA
•
Cisco 4-Port OC-3c/STM-1 POS SPA
•
Cisco 8-Port OC-3c/STM-1 POS SPA
•
Cisco 8-Port OC-12c/STM-4 POS SPA
For more information, refer to the Cisco IOS XR Interface and Hardware Component Configuration Guide for the Cisco CRS Router.
New Hardware Features for the Cisco CRS Router
The following new hardware features were introduced in Cisco IOS XR Software Release 4.0.3 on the Cisco CRS Router:
•
CRS-8-PRP-6G
•
CRS-8-PRP-12G
•
CRS-16-PRP-6G
•
CRS-16-PRP-12G
•
CRS-16-FC140/M
•
CRS-FCC-SFC-140
•
Cisco IOS XR Software Release 4.0.3 is compatible with the following Cisco CRS-3 systems:
–
Cisco CRS 4-Slot Line Card Chassis
–
Cisco CRS 8-Slot Line Card Chassis
–
Cisco CRS 16-Slot Line Card Chassis
–
Cisco CRS Multishelf Systems
Cisco CRS-3 SW Features
Note
With Cisco IOS XR Release 4.0.3 PX, CRS MSC-140 or CRS FP-140 can only be used for Provider (P) router configuration. Positioning these cards in Provider Edge (PE) router configuration is NOT supported even if they are inserted as core-facing uplink on a PE device. Please contact your Cisco representative for more information.
The following features are supported on the Cisco CRS-3 Router:
•
IP/LDP LFA FRR
•
6PE
•
BFD over Bundles support
•
IPv4 Unicast, Multicast
•
IPv6 Unicast, Multicast
•
MPLS LDP, TE, FRR
•
PBTS v4/v6/MPLS
•
P2MP-TE
•
BFD v4/v6
•
QoS
•
ACL
•
uRPF, QPPB, BGP-PA
•
Sampled Netflow
•
Link Bundles (Parity with MSC-40)
•
10GE WAN PHY
•
Single Chassis (4 , 8, 16)
•
CRS MSC-140 (same scale as FP-140 and Full QoS)
•
CRS FP-140
•
Online and Field Diagnostics
Note
Contact crs-pm@cisco.com for hardware availability.
Important Notes
•
Default timestamp setting—The timestamp prompt that precedes console output is enabled by default in Cisco IOS XR Release 3.8. To disable the timestamp prompt, use the no service timestamp command. For more information, refer to the Cisco IOS XR System Management Command Reference for the Cisco CRS-1 Router.
•
From Cisco IOS XR Software Release 3.6.0, WRED statements are collapsed in that if different random-detect statements using the same match types (EXP, DSCP, Prec, and so forth) are entered with identical minimum and maximum threshold values, a single configuration line is shown in the output of show running config. This reduces the length of the configuration but creates a problem with backward compatibility with previous releases. In such a situation, on rollback, the QoS policy is rejected and must be manually entered again.
Configuration prior to Cisco IOS XR Software Release 3.6.0:
Policy-map wred_exampleClass class-defaultrandom-detect exp 0 384 packets 484 packetsrandom-detect exp 1 384 packets 484 packetsrandom-detect exp 2 384 packets 484 packetsrandom-detect exp 3 484 packets 584 packetsrandom-detect exp 4 484 packets 584 packetsrandom-detect discard-class 0 384 packets 484 packetsrandom-detect discard-class 1 384 packets 484 packetsrandom-detect discard-class 2 484 packets 584 packetsbandwidth remaining percent 20Cisco IOS XR Software Release 3.6.0 and later releases:
policy-map wred_exampleclass class-defaultrandom-detect exp 0,1,2 384 packets 484 packetsrandom-detect exp 3,4 484 packets 584 packetsrandom-detect discard-class 0,1 384 packets 484 packetsrandom-detect discard-class 2 484 packets 584 packetsbandwidth remaining percent 20!end-policy-map!endIn Cisco IOS XR Software Release 3.6.0 and later releases, the implicitly assigned QoS class class-default must have at least 1 percent bandwidth made available to it. This can be done either by assigning at least 1 percent explicitly (bandwidth remaining percent 1) or by ensuring that the total bandwidth assigned to all other classes in the policy is a maximum of 99 percent, leaving 1 percent available for the class-default. A QoS policy that does not have any bandwidth for class-default is rejected when upgrading to Cisco IOS XR Software Release 3.6.0 or later releases.
•
Country-specific laws, regulations, and licences—In certain countries, use of these products may be prohibited and subject to laws, regulations, or licenses, including requirements applicable to the use of the products under telecommunications and other laws and regulations; customers must comply with all such applicable laws in the countries in which they intend to use the products.
•
Card, fan controller, and RP removal—For all card removal and replacement (including fabric cards, line cards, fan controller, and RP) follow the instructions provided by Cisco to avoid impact to traffic. See the Cisco IOS XR Getting Started Guide for the Cisco CRS-1 Router for procedures.
•
Exceeding Cisco testing—If you intend to test beyond the combined maximum configuration tested and published by Cisco, contact your Cisco Technical Support representative to discuss how to engineer a large-scale configuration maximum for your purpose.
•
mpls traffic engineering igp-intact command—This command must be used only when policy based tunnel selection is configured for all tunnels originating on the device.
•
The following commands are not supported on the Cisco CRS-1 Series Router:
–
affinity location set
–
affinity location type
–
affinity program
–
affinity self
•
BFD IPv6 UDP Checksum Calculation—In Cisco IOS XR Software Release 3.9, you turn the BFD IPv6 UDP checksum calculation on and off:
–
To disable the BFD IPv6 UDP checksum calculation:
RP/0/RP0/CPU0:router(config)#bfdRP/0/RP0/CPU0:router(config-bfd)#ipv6 checksum disableRP/0/RP0/CPU0:router(config-bfd)#end–
To enable BFD IPv6 UDP checksum calculation:
RP/0/RP0/CPU0:router(config)#bfdRP/0/RP0/CPU0:router(config-bfd)#no ipv6 checksum disableRP/0/RP0/CPU0:router(config-bfd)#end•
On upgrading CRS-1 software from 3.6.2 to 4.0.0 the MAC address assigned to physical interfaces changes. This is required because prior to Cisco IOS XR software Release 3.8.4 the MAC address assigned to the bundle interface was taken from the first member's MAC address. If this bundle member is removed from the bundle, the bundle gets a new MAC address, which results in traffic loss due to ARP resolution. Beginning in Cisco IOS XR software Release 3.8.4, a pool of MAC addresses are assigned to the bundle interfaces by the bundlemgr process during bundle interface creation.
•
Deactivation of os-mbi dependent (Nonreload) SMU fails—Backing out the non reload os-mbi SMU fails because deactivation runs out of memory (activation did not release some memory, which stayed at 38 MB). This failure to activate or deactivate the SMU due to insufficient SP resources impacts SP cards on CRS.
•
When configuring the Label Distribution Protocol (LDP) graceful restart (GR) process in a network with multiple [link and/or targeted] LDP hello adjacencies with the same neighbor, make sure that GR is activated on the session before any hello adjacency times out due to neighbor control plane failures. One way of achieving this is by configuring a lower session hold time between neighbors such that session time out always occurs before hello adjacency can time out. Cisco recommends setting LDP session hold time using the following formula:
LDP session hold time <= (Hello hold time - Hello interval) * 3
This means that for default values of 15/5 seconds respectively for the link Hello hold time and the Hello interval, the LDP session hold time should be set to 30 seconds or less.
For more information, refer to the "Implementing MPLS Label Distribution Protocol on Cisco IOS XR Software" section of the Cisco IOS XR MPLS Configuration Guide, Release 4.0.
•
For information about upgrading from a Cisco CRS-1 to a Cisco CRS-3 chassis, refer to the Cisco CRS-1 Carrier Routing System to Cisco CRS-3 Carrier Routing System Migration Guide at the following URL:
http://www.cisco.com/en/US/products/ps5763/prod_installation_guides_list.html
•
The following commands have been modified to support Cisco CRS-3 Router:
–
show environment
–
hw-module reload
–
show controllers egressq client location
–
show controllers egressq queue drr [max | min] location <>
–
show controllers egressq group drr [max | min] location <>
–
show controllers egressq group ntb [max | min] location <>
–
show controllers egressq port bpmap location <>
–
show controllers egressq statistics detail location <>
–
show controllers egressq resources location <>
For information about these commands, refer to the Commands section of the Cisco CRS-1 Carrier Routing System to Cisco CRS-3 Carrier Routing System Upgrade Guide:
http://www.cisco.com/en/US/products/ps5763/prod_installation_guides_list.html
•
For Cisco IOS XR software Release 4.0.0 and above, after upgrading, the FPGA upgrade using the auto-fpd upgrade command as a part of the auto-fpd upgrade process fails for the SPA-1X10GE-L-V2 SPA. The workaround is to perform a manual FPGA upgrade on the SPA-1X10GE-L-V2 SPA using the upgrade hw-module fpd fpga1 location 0/0/1 command in admin mode after the auto-fpd upgrade command execution completes.
•
The minimum timer configuration value for the BFD on Bundle Members feature (BoB) increases from 30 to 60 seconds in Cisco IOS XR Software Release 4.0.3. The timer value can be left as default or modified as follows:
–
int bundle-(ether|pos) <num>
–
bfd address-family ipv4 timers start <30-3600>
–
bfd address-family ipv4 timers nbr-unconfig <30-3600>
•
The following XFPs are supported in this release:
–
XFP-10G-MM-SR
–
XFP10GLR-192SR-L
–
XFP10GER-192IR-L
–
XFP-10GZR-OC192LR
–
DWDM-XFP-30.33
–
DWDM-XFP-60.61
–
DWDM-XFP-50.92
–
DWDM-XFP-50.12
–
DWDM-XFP-31.12
–
DWDM-XFP-31.90
–
DWDM-XFP-32.68
–
DWDM-XFP-34.25
–
DWDM-XFP-35.04
–
DWDM-XFP-35.82
–
DWDM-XFP-36.61
–
DWDM-XFP-38.19
–
DWDM-XFP-38.98
–
DWDM-XFP-39.77
–
DWDM-XFP-40.56
–
DWDM-XFP-42.14
–
DWDM-XFP-42.94
–
DWDM-XFP-43.73
–
DWDM-XFP-44.53
–
DWDM-XFP-46.12
–
DWDM-XFP-46.92
–
DWDM-XFP-47.72
–
DWDM-XFP-48.51
–
DWDM-XFP-51.72
–
DWDM-XFP-52.52
–
DWDM-XFP-54.13
–
DWDM-XFP-54.94
–
DWDM-XFP-55.75
–
DWDM-XFP-56.55
–
DWDM-XFP-58.17
–
DWDM-XFP-58.98
–
DWDM-XFP-59.79
Reference caveat, CSCtk96820. Please contact your Cisco representative for more information on dates by which this will be available.
•
For Cisco IOS XR software Release 4.0.0 and above the hw-module location <LOC> reload warm command has been disabled. This means that the warm reload feature has been disabled.
New DWDM Configuration Requirement
Note
This section describes only the new DWDM configuration requirements in Cisco IOS XR 3.9.0 and later releases. It does not describe all updates to the DWDM feature. For more information about DWDM configuration, refer to the "Configuring Dense Wavelength Division Multiplexing Controllers on Cisco IOS XR Software" module in the Cisco IOS XR Interface and Hardware Component Configuration Guide for the Cisco CRS-1 Router.
Cisco IOS XR Software Release 3.9.0 introduced new commands in addition to an important change to the default laser state for all of the DWDM physical layer interface modules (PLIMs) supported on the Cisco CRS-1 router, which impacts the required configuration to support those cards.
This change affects all models of the following hardware on the Cisco CRS-1 router:
•
Cisco 1-Port OC-768c/STM-256c DWDM PLIM
•
Cisco 4-Port 10-Gigabit Ethernet DWDM PLIM
Summary of Important DWDM Changes in Cisco IOS XR Software Release 3.9.0 and Later Releases
•
The laser off and shutdown (DWDM) commands are replaced by the admin-state out-of-service command.
•
The default state of the laser has changed from "On" to "Off" for all PLIMs. Therefore, the laser for all DWDM controllers must explicitly be turned on using the admin-state in-service command in DWDM configuration mode.
Configuration Examples in Cisco IOS XR Software Release 3.9.0 and Later Releases
This section provides configuration examples for turning on and off the laser on a DWDM PLIM.
Turning On the Laser: Example
Note
This is a required configuration beginning in Cisco IOS XR Software Release 3.9.0. The DWDM PLIMs will not operate without this configuration.
The following example shows how to turn on the laser and place a DWDM port in In Service (IS) state:
RP/0/RP0/CPU0:router# configureRP/0/RP0/CPU0:router(config)# controller dwdm 0/1/0/1RP/0/RP0/CPU0:router(config-dwdm)# admin-state in-serviceRP/0/RP0/CPU0:router(config-dwdm)# commitTurning Off the Laser: Example
Note
This configuration replaces the laser off and shutdown (DWDM) configuration commands.
The following example shows how to turn off the laser, stop all traffic and place a DWDM port in Out of Service (OOS) state:
RP/0/RP0/CPU0:router# configureRP/0/RP0/CPU0:router(config)# controller dwdm 0/1/0/1RP/0/RP0/CPU0:router(config-dwdm)# admin-state out-of-serviceRP/0/RP0/CPU0:router(config-dwdm)# commitMinimum Flash Disk Requirements When Upgrading to Release 4.0.3
Cisco IOS XR Software Release 4.0.3 requires a 2-GB Flash Disk as a minimum. If your Cisco CRS currently uses a 1-GB Flash Disk, you must upgrade it to 2-GB before upgrading to Cisco IOS XR Software Release 4.0.3. The PCMCIA 1-GB Flash Disk was the default size for the Cisco CRS running Cisco IOS XR Software Release 3.6 and earlier.
In Cisco IOS XR Software Release 3.6 and later releases, disk partitioning is supported. Partitioning of a 2-GB disk is possible but not required. Partitioning of a 4-GB disk is required.
A 4-GB Flash Disk can be installed instead of the 2-GB for greater disk storage.
To upgrade from a 1-GB flash disk to a 2-GB or greater flash disk, refer to the Flash Disk Upgrade Tasks link on the following Cisco CRS Router Installation and Upgrade URL: http://www.cisco.com/en/US/products/ps5763/prod_installation_guides_list.html
Additional upgrade instructions for the Cisco CRS router are available from http://www.cisco.com/web/Cisco_IOS_XR_Software/pdf/ReplacingPCMCIACardOnCRS-1.pdf
Caveats
Caveats describe unexpected behavior in Cisco IOS XR software releases. Severity-1 caveats are the most serious caveats; severity-2 caveats are less serious.
This section contains caveats that are generic to the Cisco IOS XR Release 4.0.3 software and those specific to the Cisco CRS-1 Router and the Cisco CRS-3 Router.
Cisco IOS XR Caveats
The following open caveats apply to Cisco IOS XR Software Release 4.0.3 and are not platform specific:
•
CSCtg40080
Basic Description:
Show mrib route does not show proper "Flag" output for ExtranetV6
Symptom:
Flag field is incorrect in "show mrib route".
Conditions:
When you have IPv6 MVPN enabled.
Workaround:
There is no work around. It is a show command issue.
Further Problem Description:
None.
•
CSCti48713
Basic Description:
SONET_SDH XML does not bind to correct path for history stats
Symptom:
'PM get path data failed : Invalid argument ' message will be displayed on the console
Conditions:
This symptom is observed when querying the SONET_SDH XML schema.
Workaround:
None.
Recovery:
None.
•
CSCtj04006
Basic Description:
Bundle Member MAC address should not be changed.
Symptom:
Connectivity Fault Management (CFM) symptoms: CFM peers detect a new peer maintenance endpoint (MEP) with a different MAC address when a member interface is added/removed to a bundle. The old peer using the previous MAC address remains in the database for a period of time before timing out (100 minutes by default).
Cisco Discovery Protocol (CDP) symptoms: If CDP is running on a physical interface that is added or removed from a Bundle-Ether interface, then a peer device reports two CDP neighbors on the same interface for a short period of time until the old entry times out (normally around three minutes).
Conditions:
This issue occurs when running CDP or CFM on a physical interface that is added to or removed from a Bundle-Ether interface.
Workaround:
No workaround is required for CDP. No workaround is available for CFM.
Recovery:
The stale CDP neighbor entry automatically timeouts after less than five minutes and is removed from the CDP neighbor database. This is accompanied by a syslog message like the following example:
cdp[120]: %L2-CDP-6-DELETED_NEIGHBOR : CDP Neighbour foobar on interface GigabitEthernet0/1/0/1 has been deleted, remote interface GigabitEthernet0/1/0/2The stale CFM entry normally timeouts after about 100 minutes. The CLI command clear ethernet cfm peer meps can also be used to clear the CFM MEP table.
Note
This command causes all MEPs (and associated statistics) to be removed until they are re-learned.
Further Problem Description:
This problem is caused because CDP and CFM are using the interface MAC address to identify the peer. When a physical interface is added to a bundle, the MAC address of the physical interface is changed to that of the bundle interface. When a physical interface is removed from a bundle, then the MAC address is reverted back to the BIA MAC address associated with the physical interface.
•
CSCtj45064
Basic Description:
Slow CLI response during multiple VTY connections.
Symptom:
In Cisco IOS XR software if the telnet or ssh access frequency is very high, the CLI response performance may decrease significantly. The CPU load increases to more than 90% with the top consumer processes of sysdb_svr_local, sysdb_shared_nc, and sysdb_mc. Eventually telnet and ssh access is not possible any more.
Conditions:
This issue occurs with fast consecutive and lasting telnet or ssh login attempts and multiple logins per minute over a long period of time.
Workaround:
Do not use more than three telnet or ssh login attempts per minute continuously over a lasting period of time.
Recovery:
Reduce the frequency of telnet or ssh logins.
•
CSCtj54889
Basic Description:
"snmpd[1101]: t11 Failed process trap" flooding the console.
Symptom:
–
"snmpd[1101]: t11 Failed process trap" messages.
–
snmpd is consuming high memory and CPU with a sustained high rate of traps. See "show snmp" and "show snmp traps" to find the trap rate and per-trap type counts.
Conditions:
This was seen with "logging trap debug" and "snmp-server traps syslog" configured while a high rate debugs are enabled. This is likely with the above configuration when enabling of "debug snmp trap" as it creates a feedback loop resulting in exponential growth in the rate of syslog traps.
Workaround:
Change any "logging trap debug" configuration to have syslogs of higher severity generated as traps, for example 'logging trap informational' or 'logging trap warning'. It is not recommended to use the configuration 'logging trap debug' as that causes EVERY syslog, including debugs, to be generated as SNMP traps via the CISCO-SYSLOG-MIB. This causes a trap storm.
Recovery:
–
Disable any debugs that are causing high rate of traps.
–
Restart the snmpd process by issuing process restart snmpd.'
–
Change the SNMP trap send throttle, snmp-server trap throttle-time <>, configuration to the minimum of 10 ms: snmp-server trap throttle-time 10
–
Disable any high rate traps by issuing no snmp-server traps <>.
–
Remove all snmp-server host configuration until the condition clears.
•
CSCtk53821
Basic Description:
BGP IAS functionality now requires explicit next-hop-self config.
Symptom:
BGP IAS functionality has changed since Cisco IOS XR Release 3.9.x.
Conditions:
End-to-end connectivity for IAS failed due to the removal of implicit next-hop-self configuration.
Workaround:
Explicitly configure next-hop-self.
•
CSCtk58144
Basic Description:
IPv6 BGP session flapping due to RX path issue.
Symptom:
Few IPv6 BGP sessions configured with <= (15/45) timer might flap during RP FO when configured with NSR.
Conditions:
This issue might occur if the following conditions are met:
1.
NSR configured for BGP
2.
IPv6 BGP session configured with aggressive timer
3.
RP FO
Workaround:
No workaround required. Those sessions come up.
Recovery:
Recovery occurs automatically.
•
CSCtk60283
Basic Description:
cefcModuleOperStatus showing wrong value for SPA-5X1GE in Cisco XR 12000 Series Router XR Release 4.0.0.
Symptom:
On a Cisco router running IOS-XR the value of mib cefcModuleOperStatus changes to 5 during line card reload. A value of 5 is wrong. It should be 2. If a LC with a modular PLIM (SIP) is reloaded, the cefcModuleOperStatus MIB value for the SPAs remains 2. This complies to status "OK" and the card down alarm/ link down service alarms are not generated for the SPAs on the management station.
Conditions:
The problem is only seen during reload of line card.
Workaround:
No workaround is available.
Recovery:
It is a transient issue and recovers automatically when the line card reload is completed.
•
CSCtl86733
Basic Description:
ARP is not resolved due to ARP not process FIB API return correctly.
Symptom:
ARP entries are not always getting resolved on the second link of parallel links when using proxy ARP, potentially leading to traffic loss.
Conditions:
This issue occurs in Cisco IOS XR releases between 4.0.1 and 4.0.3 using static directed routes and proxy ARP to resolve ARP entries on the second link of parallel links.
Workaround:
None.
Recovery:
None.
•
CSCtn55374
Basic Description:
Not able to unconfigure LPTS configs.
Symptom:
In Cisco IOS-XR release, de-configuring a location-specific lpts pifib hardware policer fails. Committing the "no" form of the user mode config command, lpts pifib hardware police location <loc> flow <flow type> rate, fails.
The user may observe the following on the failure.
RP/0/RP0/CPU0:my-router(config)#no lpts pifib hardware police location 0/1/CPU0RP/0/RP0/CPU0:my-router(config)#commit% Failed to commit one or more configuration items during a pseudo-atomicoperation. All changes made have been reverted. Please issue 'showconfiguration failed' from this session to view the errorsRP/0/RP0/CPU0:my-router(config)#show config failed errors!! SEMANTIC ERRORS: This configuration was rejected by!! the system due to semantic errors. The individual!! errors with each failed configuration command can be!! found below.lpts pifib hardware police location 0/1/CPU0no flow bgp default rate 30000!!% 'sysdb' detected the 'warning' condition 'An invalid argument was passedto a SysDB function (maybe a NULL pointer?)'!endConditions:
1.
De-configure the location specific "lpts pifib hardware police:"
no lpts pifib hardware police location <loc> flow <flow type> rate
2.
Issue the "commit replace" command after configuring location specific "lpts pifib hardware police flow rate".
(config)#lpts pifib hardware police location <loc> flow <flow type> rate <value>(config)#commit(config)#commit replaceDe-configuring a global "lpts pifib hardware police flow" does not lead to a failure.
The problem is not present in Cisco IOS-XR releases prior to Cisco IOS XR Release 4.0.2.
Workaround:
Not available.
Recovery:
Manually configure the location specific "lpts pifib hardware police flow rate" to its default. The default policer rate can be obtained with the following CLI command:
show lpts pifib hardware police location R/S/CPU0
•
CSCtn77057
Basic Description:
Dumper not honoring "exception choice" config during process crash.
Symptom:
In Cisco IOS XR the core file of a process crash is not stored in the directory specified in the "exception choice" configuration.
Conditions:
A user configured "exception choice" like the following example to store core files in the non-default directory on harddisk in IOS-XR:
exception choice 1 compress on filepath harddisk:/foobarThe core file of a process crash might be written to harddisk:/dumper instead to harddisk:/foobar. The problem is not present in IOS-XR releases prior to Cisco IOS XR Release 4.0.2.
Workaround:
Use the default configuration for writing core files.
Recovery:
The core file is not getting lost after a process crash. It is written to the default directory "dumper" on harddisk.
•
CSCtn82051
Basic Description:
Fabric plane mcast down after rack reload on Cisco CRS Multishelf.
Symptom:
On a Cisco CRS Multishelf system, the "Oper State" of a fabric plane might be "MCAST_DOWN" after a Line Card Chassis (LCC) reload.
Conditions:
An LCC is reloaded on a CRS Multishelf system. The problem is not consistently reproducible.
Workaround:
None available.
Recovery:
Shut/no shut down the affected fabric plane in admin config mode.
See the following example:
(admin-config)#controllers fabric plane 2 shutdown(admin-config)#commit(admin-config)#no controllers fabric plane 2 shutdown(admin-config)#commit•
CSCtn94341
Basic Description:
Harddisk Disk Mirroring failed after rack OIR.
Symptom:
On a Cisco CRS-1 or Cisco CRS-3, harddisk mirroring may fail sync with resource busy error after RP reload.
Conditions:
1.
Harddisk mirroring is enabled in admin config mode with the command: mirror boot-harddisk
2.
No local disk mirroring is configured in the user config mode.
3.
A node that has harddisk mirroring enabled is reloaded.
The problem also applies to Cisco IOS XR Release 4.0.1.
Workaround:
None available.
Recovery:
Disable harddisk mirroring in admin config mode.
•
CSCtn79219
Basic Description:
System running into low memory conditions.
Symptom:
Install activate/deactivate fails with wdsysmon messages on memory shortage.
Conditions:
This issue occurs when the system has many active pies/SMUs, and the system overall is slow on free memory.
Workaround:
Free up system memory by disabling or removing the feature or configuration such as BGP, etc.
Recovery:
Install should fail before PONR, and no manual recovery is needed.
•
CSCto21373
Basic Description:
S16: mibd_interfaces crash while polling cIpMRouteNextHopTabl.e
Symptom:
In Cisco IOS-XR a crash of process mibd_interface might be observed when the mroute mib is polled.
Conditions:
Multicast is configured. The OID cIpMRouteNextHopTable of mroute mib is polled.
Workaround:
Not available.
Recovery:
The process is restarted automatically.
•
CSCto23734
Basic Description:
GSP crashed when demote/promote message is in a node out-of-order queue.
Symptom:
GSP process crashes. The crash is accompanied by the following syslog message:
LC/0/1/CPU0:Mar 24 10:26:25.012 PST: gsp[186]: %OS-DISTRIB_LIB-3-GSP_TRACE_BACK : gs_mem_release_internal : first attempt to free non pool memory 0x501ffa20 : pkg/bin/gsp : (PID=151620) : -Traceback= 4c87a8e8 40014f58 4002ce38 4003b2a8 4003b9e0 4c2b23c4Conditions:
GSP control messages arrived at one node out of order. This could happen because of the GSP control traffic burst originating from multiple nodes in the system. This condition might occur during router boot up or simultaneous process restart.
Workaround:
Not available.
Recovery:
The GSP process is restarted automatically.
•
CSCto33286
Basic Description:
Stale entries seen in show pim ipv4 rpf output even after commit replace.
Symptom:
In Cisco IOS-XR, stale entries are seen in the output of the CLI command, show pim ipv4 rpf'.
Conditions:
This issue occurs under the following conditions:
One or more RP addresses are learned through Auto-RP.
The VRF's multicast configuration is removed.
Workaround:
Not applicable.
Recovery:
Restart the PIM process.
•
CSCto34421
Basic Description:
EDM request Timeouts from online_diag_lc for Cisco CRS-3 LCs in steady state.
Symptom:
In Cisco IOS-XR, SYSDB-SYSDB-6-TIMEOUT_EDM syslog messages might be displayed steadily.
Conditions:
A syslog message like the following example might be displayed steadily:
RP/0/RP0/CPU0:Mar 29 10:20:05.152 : sysdb_svr_admin[346]: %SYSDB-SYSDB-6-TIMEOUT_EDM : EDM request for 'admin/oper/fabric/rack/2/lport/s1tx/' from 'online_diag_lc' (jid 227, node 2/3/CPU0). No response from 'fsdb_server' (jid 211, node 2/RP1/CPU0) within the timeout period (100 seconds).It indicates that certain EDM requests are rejected by the sysdb. The reason is that the sysdb is not able to allocate memory for replies because of memory fragmentation. The probability of hitting this problem is low.
Workaround:
Not available.
Recovery:
Restart the sysdb_svr_admin process: process restart sysdb_svr_admin
•
CSCti50227
Basic Description:
Not able to modify RPL and delete prefix-set in a single commit.
Symptom:
When a policy that is attached directly or indirectly to an attach point needs to be modified, a single commit operation cannot be performed when:
–
Removing a set or policy referred by another policy that is attached to any attach point directly or indirectly.
–
Modifying the policy to remove the reference to the same set or policy that is getting removed.
Workaround:
The commit must be performed in two steps:
1.
Modify the policy to remove the reference to the policy or set and then commit.
2.
Remove the policy or set and commit.
Caveats Specific to the Cisco CRS-1 and the Cisco CRS-3 Routers
The following open caveats are specific to the Cisco CRS-1 and CRS-3 platforms:
•
CSCth36615
Basic Description:
Auto FPD upgrade is not triggered in some conditions.
Symptom:
On a Cisco CRS-1 or Cisco CRS-3 router, FPD auto-upgrade is configured. During an IOS-XR upgrade, the fpd auto-upgrade is not triggered. The output of the "admin" mode CLI command "show hw-module fpd location all" still displays nodes with a fpga or rommon down revision.
Conditions:
FPD auto-upgrade is only triggered if the new IOS-XR version contains a newer FPD PIE that has newer firmware versions as in the previous release.
RommonA is not upgraded by FPD auto-upgrade. FPD auto-upgrade is not triggered at software downgrades.
Workaround:
Not applicable.
Recovery:
User should manually perform the upgrade using the upgrade hw-module fpd CLI from the admin mode. This ensures that the rommon/fpga versions for that node are compatible with the current image and are in sync with the FPD package that is currently active on the router. Subsequently, auto-fpd upgrade should work for such a node whenever there is a change in the FPD package between the From and To images.
•
CSCti47976
Basic Description:
Enhance Install TAR to use HDD as a staging device.
Symptom:
On a Cisco router running Cisco IOS XR, the install add tar operation might fail with the following error message displayed:
Error: Cannot proceed with the add operation due to insufficient memoryError: on this node.Error: Suggested steps to resolve this:Error: - Free memory resources before adding the tar file to theError: system.Conditions:
This issue can be seen on any system when attempting to "install add" large tar files. It affects all versions prior to Cisco IOS XR Release 4.1.
Workaround:
The two possible workarounds are:
1.
Free some memory before attempting the operation. There needs to be a minimum of (2 * tar size) + 300 MB of available memory for the operation to complete successfully.
2.
Split the tar file into two or more smaller tar files respecting the size of each tar file which needs to satisfy the condition (2 * tar size) + 300 MB available memory.
•
CSCtn82971
Basic Description:
Multiple processes blocked on sysdb_svr_local on LC after reload
Symptom:
After a reload of a Cisco CRS-1, the following error message might be observed from sfe_drvr process on all fabric SMs:
SP/0/SM4/SP:Mar 8 23:06:16.601 : sfe_drvr[120]: %FABRIC-FABRIC_DRVR-3-ERRRATE_EXCEED_SLOW : SEA ASIC: s3/0/SM4/SP/3, MC NQ Err: HP Err Dest Bitmap: 0x10000000 HP Enabled Queues: 0xc3333333 LP Err Dest Bitmap: 0x0 LP Enabled Queues: 0xc3333333.Conditions:
The NQ Errors of the above message are observed for destinations on a particular LC. In parallel the interface configurations of the affected LC appears in the preconfigure mode. Many processes on the LC are blocked on sysdb_svr_local.
Workaround:
None available.
Recovery:
Restart of SLD process should recover the issue.
•
CSCtn98033
Basic Description:
show controllers fabric plane statistics shows garbage values sometimes.
Symptom:
The output of the admin CLI command, show controllers fabric plane all statistics, might display large garbage values in the "Cell" columns.
Conditions:
The problem might be observed when the above command is executed several times very fast in a row.
Workaround:
If the command is issued serially, allow a couple of seconds time between each execution.
Recovery:
Rerun the command if the problem is present after some time.
Caveats Specific to the Cisco CRS-3 Router
The following open caveats are specific to the Cisco CRS-3 platform:
•
CSCtk96820
Basic Description:
10GZR-OC192LR, DWDM XFP not up after interface flapping.
Symptom:
10GZR-OC192LR, 1 DWDM 50.92 might not be up after interface flapping.
Conditions:
This issue occurs with interface flapping.
Workaround:
Shut/unshut interface 1 more time to recover it.
•
CSCtn50652
Basic Description:
ASIC scan validation failed for superstar S2
Symptom:
On Cisco CRS-3 S2 Fabric Switch Module, the ASIC scan function is not available when a critical ASIC error is detected by the software.
Conditions:
The problem is only present on Cisco CRS-3 Multishelf S2 Fabric Switch Modules.
Workaround:
No workaround is available.
Recovery:
The problem does not affect functionality of the module. No manual recovery is needed. The S2 card is reloaded after critical errors are detected.
Upgrading Cisco IOS XR Software
Cisco IOS XR software is installed and activated from modular packages, allowing specific features or software patches to be installed, upgraded, or downgraded without affecting unrelated processes. Software packages can be upgraded or downgraded on all supported card types, or on a single card (node).
Software packages are installed from package installation envelope (PIE) files that contain one or more software components.
The following URL contains links to information about how to upgrade Cisco IOS XR software:
http://www.cisco.com/web/Cisco_IOS_XR_Software/index.html
Migrating Cisco CRS-1 to Cisco CRS-3
For information about migrating from a Cisco CRS-1 to a Cisco CRS-3 chassis, refer to the Cisco CRS-1 Carrier Routing System to Cisco CRS-3 Carrier Routing System Migration Guide at the following URL:
http://www.cisco.com/en/US/products/ps5763/prod_installation_guides_list.html
Troubleshooting
For information on troubleshooting Cisco IOS XR software, refer to the Cisco IOS XR Troubleshooting Guide for the Cisco CRS Router and the Cisco IOS XR Getting Started Guide for the Cisco CRS Router.
Related Documentation
The most current Cisco CRS Router hardware documentation is located at the following URL:
http://www.cisco.com/en/US/products/ps5763/tsd_products_support_series_home.html
The Cisco IOS XR software documentation set includes the Cisco IOS XR software configuration guides and command references, as well as a getting started guide.
The most current Cisco CRS Router software documentation is located at the following URL:
http://www.cisco.com/en/US/products/ps5763/tsd_products_support_series_home.html
Obtaining Documentation and Submitting a Service Request
For information on obtaining documentation, submitting a service request, and gathering additional information, see What's New in Cisco Product Documentation at: http://www.cisco.com/en/US/docs/general/whatsnew/whatsnew.html.
Subscribe to What's New in Cisco Product Documentation, which lists all new and revised Cisco technical documentation, as an RSS feed and deliver content directly to your desktop using a reader application. The RSS feeds are a free service.
This document is to be used in conjunction with the documents listed in the "Related Documentation" section.
Cisco and the Cisco logo are trademarks or registered trademarks of Cisco and/or its affiliates in the U.S. and other countries. To view a list of Cisco trademarks, go to this URL: www.cisco.com/go/trademarks. Third-party trademarks mentioned are the property of their respective owners. The use of the word partner does not imply a partnership relationship between Cisco and any other company. (1110R)
© 2011 Cisco Systems, Inc. All rights reserved.
Feedback
