Cisco 7304 FPGA Bundling and Update

Table Of Contents

Cisco 7304 FPGA Bundling and Update

Feature Overview

Benefits

Restrictions and Important Notes Regarding FPGA

Related Features and Technologies

Related Documents

Supported Platforms

Supported Standards, MIBs, and RFCs

Configuration Tasks

Setting Automatic FPGA Upgrades (Cisco IOS Release 12.2(20)S6 Onward)

Enabling FPGA Prompting (Cisco IOS Release 12.2(20)S6 Onward)

Setting Automatic FPGA Upgrades (Cisco IOS Release 12.2(20)S4 and 12.2(20)S5 Only)

Manually Starting the FPGA Image Update

Verifying the FPGA Version

FPGA Verification Steps (Cisco IOS Release 12.2(20)S6 Onward)

Verifying Status of an In-Progress FPGA Upgrade

FPGA Verification Steps (Prior to Cisco IOS Release 12.2(20)S6)

Troubleshooting Tips

Monitoring and Maintaining the Cisco 7304 Router

Configuration Examples

Manually Updating FPGA (Cisco IOS Release 12.2(20)S6 or later)

FPGA Image Update after a Line Card OIR Example (Prior to Cisco IOS Release 12.2(20)S6)

Forcing Automatic FPGA Updates Example

Enabling FPGA Prompting Example

Command Reference

show c7300

show diag

show upgrade fpga progress

upgrade fpga

upgrade fpga all

Cisco 7304 FPGA Bundling and Update

Feature History

Note While this feature history table only documents changes to the feature, users need to understand that FPGA is a component on any Cisco 7304 router regardless of Cisco IOS release. This doc, therefore, applies to any Cisco 7304 router.

Release

Modification

12.1(10)EX

This feature was introduced.

12.2(11)YZ

Support was added for the Cisco 7304 PCI Port Adapter Carrier Card (7300-CC-PA).

12.2(18)S

This feature was introduced on Cisco 7304 routers running Cisco IOS Release 12.2 S.

12.2(20)S4

The upgrade fpga prompt command was introduced.

12.2(20)S6

The no upgrade fpga command was introduced and became the default setting.

The no upgrade fpga prompt command behavior was changed. The no upgrade fpga prompt configuration no longer automatically begins an FPGA upgrade when an FPGA mismatch is detected.

The prompt asking users if they would like to reload the line card to complete the FPGA upgrade process after entering the upgrade fpga all command was added.

The show c7300 command was modified to show more FPGA information.

The show upgrade fpga progress command was introduced.

The upgrade fpga force command was introduced.

This document describes the Cisco 7304 FPGA Bundling and Update feature and contains the following sections:

•Feature Overview

•Supported Platforms

•Supported Standards, MIBs, and RFCs

•Configuration Tasks

•Monitoring and Maintaining the Cisco 7304 Router

•Configuration Examples

•Command Reference

Feature Overview

A Field-Programmable Gate Array (FPGA) is a programmable memory device. Cisco 7304 routers have FPGA images on many hardware components, including line cards, modular services cards, the 7304-CC-PA, and most hardware that can be installed directly into Cisco 7304 router slots. In many Cisco products using many Cisco IOS releases, the FPGA is unbundled from the Cisco IOS. With the introduction of the FPGA Bundling and Update feature, FPGA images are bundled with Cisco IOS images for the Cisco 7304 router. This bundling eliminates possible conflicts between the Cisco IOS image and the FPGA image required for a particular piece of hardware. During system boot up or after an OIR insertion of a hardware component that requires FPGA, the router automatically checks to ensure the FPGA of the hardware matches the FPGA image in the Cisco IOS. If an FPGA discrepancy between the hardware and the Cisco IOS release is detected, you must upgrade FPGA. The router behavior after an FPGA conflict is detected is dependant on the Cisco IOS release running on your router and your configuration:

•If you are using a Cisco 7304 router running Cisco IOS Release 12.2(20)S6 or later, you will not, by default, be prompted for an FPGA upgrade if an FPGA mismatch is detected during the FPGA check. If you maintain this default setting, a system message will inform you that your FPGA needs to be upgraded. You can upgrade FPGA manually by entering the upgrade fpga all command in this release.
In Release 12.2(20)S6 or later, however, you do have the option to use the upgrade fpga force and upgrade fpga prompt commands. If the upgrade fpga force command is configured when an FPGA mismatch is detected, an FPGA upgrade is performed automatically. If the upgrade fpga prompt command is configured when an FPGA mismatch is detected, a prompt asking if you would like to perform an FPGA upgrade appears when an FPGA mismatch is detected. Answering y to the prompt will begin the upgrade. It is important to note, though, that neither of these option is enabled by default.

•If you are using a Cisco 7304 router running a pre-Cisco IOS Release 12.2(20)S6 image, a prompt asking if you would like to perform an FPGA upgrade appears. Answering y to the prompt will begin the upgrade. You can also upgrade FPGA manually by entering the upgrade fpga all command in this release.

•If you are using Cisco IOS Release 12.2(20)S4 or 12.2(20)S5, the prompting for FPGA upgrades can be disabled by entering the no upgrade fpga prompt command. If the FPGA upgrade prompt is disabled, an FPGA upgrade will occur automatically when an FPGA mismatch is detected. If FPGA prompting is enabled (which is the default setting), you will be prompted to perform an FPGA upgrade when an FPGA mismatch is detected as you would with all other pre-Cisco IOS Release 12.2(20)S6 images.
Note that this behavior for no upgrade fpga prompt only occurs in Cisco IOS Release 12.2(20)S4 and 12.2(20)S5. In Cisco IOS Release 12.2(20)S6, the behavior of the upgrade fpga prompt command was changed.

Benefits

The FPGA Bundling and Update feature provides the following benefits:

•Eliminates conflicts between the Cisco IOS image and an unsupported FPGA

•Eliminates conflicts between hardware versions of the various Cisco 7304 hardware (such as line cards, jacket cards, processors, and so on) and FPGA images

Restrictions and Important Notes Regarding FPGA

•Cisco Systems recommends performing FPGA upgrades during maintenance windows and not on active routers in live networks. There are several reasons to not perform FPGA upgrades on live routers, including traffic disruption and longer required times to upgrade FPGA.

•Traffic disruption will occur during FPGA upgrades for any traffic on the Cisco 7304 router, even if the traffic is not passing through the piece of hardware that is upgrading FPGA. It is especially important to keep this fact in mind when performing a manual FPGA upgrade using the fpga upgrade all command on a router on a live network. This is a primary reason why Cisco Systems recommends upgrading FPGA during maintenance windows.

•Before performing an FPGA upgrade, a message will appear on your console describing the length of the FPGA upgrade. Note, however, that this estimated upgrade time assumes that the router is not on a live network. A router on a live network will take substantially longer to upgrade FPGA than the system message indicates.

•On a router not on a live network, an FPGA image update for one FPGA takes from 5 to 15 minutes to complete depending on the FPGA. A router on a live network may take substantially longer to update, depending on network traffic and other conditions. Only one FPGA can be upgraded at a time, so cases where multiple FPGAs require upgrades can take substantially longer (for instance, if three FPGAs need to be upgraded and each upgrade requires 15 minutes, the time required to complete the upgrade for all FPGAs on the Cisco 7304 router will take 45 minutes).

•Do not power-cycle the router during an FPGA upgrade.

•Do not remove a piece of hardware that is upgrading FPGA during an FPGA upgrade.

•For Cisco 7304 Shared Port Adapters (SPAs), the SPA FPD image package contains the FPGA image. The SPA FPD image package is separate from the Cisco IOS software and the process for downloading it is completely independent from other FPGA image upgrades. For information on upgrading the FPD image package, see the "Upgrading Field-Programmable Devices" chapter of the Cisco 7304 Router Modular Services Card and Shared Port Adapter Software Configuration Guide.

•If an FPGA upgrade is performed on a processor, the upgrade is not complete until the router is reloaded. For all other FPGA upgrades, the FPGA upgrade is not complete until the hardware is reloaded. Depending on your Cisco IOS release and your configuration, the hardware reload to complete the FPGA upgrade will either occur automatically or a prompt will appear asking if you would like to reload the hardware. The hardware reload will not impact router performance as a whole but will temporarily take the hardware offline while the reload completes.

•If an FPGA image update on a line card fails after several retries due to a hardware failure, an error message is displayed and the FPGA update on the line card is not completed.

•If an FPGA image update on an NSE or NPE fails after several retries, the NSE or NPE is deactivated, but a minimum boot is performed to facilitate disaster recovery.

•If you manually start an FPGA image update process via virtual terminal type (vty) and update the FPGA image of the NSE, the vty will not be available when the router reloads. As the router reloads, the status of the FPGAs is logged to the console.

•Some line cards and NSEs may require different FPGA images depending on the version of that line card or processor. If an FPGA image is not available in the Cisco IOS bundle for that line card or NSE, a warning message is displayed and the FPGA update is skipped.

•FPGA images have major and minor versions. FPGA 0.3, for example, is major version 0 and minor version 3. A major version change requires corresponding Cisco IOS changes; a major version may not be backward-compatible with an older Cisco IOS version. When a new major version is released, you should upgrade to the latest FPGA version. A minor version change can include caveat fixes and other minor changes. You may choose to skip a minor version update if you are certain you do not need that particular update. Refer to the Cisco IOS release notes for details on specific releases.

•On an NSE-150 only, minimal boot mode is entered on the NSE-150 if an in-progress FPGA upgrade is abruptly stopped (due to various factors such as a power outage, router crash, hardware OIR, or other reason).
In minimal boot mode, the Fast Ethernet management port (interface fastethernet 0) is the only working port on the NSE-150.
If minimal boot mode is entered when using a Cisco 7304 with an NSE-150 because an FPGA upgrade was interrupted, simply retry the upgrade in minimal boot mode using the upgrade fpga all command.

•After upgrading the FPGA, the router can be booted using a Cisco IOS image on one of the Flash file systems on the router or from another source.

Related Features and Technologies

All hardware components that use FPGA for the Cisco 7304 router should be using the proper FPGA version. For information on specific FPGA version numbers, check the Cisco IOS release notes for your particular Cisco IOS release.

Related Documents

•Cisco 7300 Series Platform-Specific Commands

•Cisco 730 4 Router Troubleshooting

•C isco 7304 N e twork Services Engine Installation and Configuration

•Cisc o 7304 Router Installation and Configuration Guide

•Cisco 7304 Router Line Card Hardware Configuration Guidelines

•Cisco 7304 Quick Start Guide

•Cisco 7304 Router Troubleshooting and Configuration Notes

•Clear Channel 6-Port T3 (DS3) Line Card Installation and Configuration

•O C3 Packet Over SONET Line Card Installation and Configuration

•OC12 Packet Over SONET Line Card Installation and Configuration

•OC48 P acket Over SONET Line Card Installation and Configuration

•Regulatory Compliance and Safety Information for the Cisco 730 4 Internet Routers

•Cisco 7304 PCI Port Adapter Carrier Card Installation and Configuration Guide

•Cisco 7304 Router Modular Services Card and Shared Port Adapter Software Guide

Supported Platforms

•Cisco 7304

Supported Standards, MIBs, and RFCs

Standards

No new or modified standards are supported by this feature.

MIBs

N o MIBs supported related to Cisco 7304 FPGA.

To locate and download MIBs for selected platforms, Cisco IOS releases, and feature sets, use Cisco MIB Locator found at the following URL:

http://tools.cisco.com/ITDIT/MIBS/servlet/index

If Cisco MIB Locator does not support the MIB information that you need, you can also obtain a list of supported MIBs and download MIBs from the Cisco MIBs page at the following URL:

http://www.cisco.com/public/sw-center/netmgmt/cmtk/mibs.shtml

To access Cisco MIB Locator, you must have an account on Cisco.com. If you have forgotten or lost your account information, send a blank e-mail to cco-locksmith@cisco.com. An automatic check will verify that your e-mail address is registered with Cisco.com. If the check is successful, account details with a new random password will be e-mailed to you. Qualified users can establish an account on Cisco.com by following the directions found at this URL:

http://www.cisco.com/register

RFCs

No new or modified RFCs are supported by this feature.

Configuration Tasks

See the following sections for the configuration tasks for the FPGA Bundling and Update feature:

•Setting Automatic FPGA Upgrades (Cisco IOS Release 12.2(20)S6 Onward)

•Enabling FPGA Prompting (Cisco IOS Release 12.2(20)S6 Onward)

•Setting Automatic FPGA Upgrades (Cisco IOS Release 12.2(20)S4 and 12.2(20)S5 Only)

•Manually Starting the FPGA Image Update

Note Cisco Systems recommends performing FPGA upgrades during maintenance windows and not on active routers in live networks. There are several reasons to not perform FPGA upgrades on live routers, including traffic disruption and longer required times to upgrade FPGA.
Please keep this recommendation in mind before upgrading FPGA on your Cisco 7304 router.

Setting Automatic FPGA Upgrades (Cisco IOS Release 12.2(20)S6 Onward)

Starting in Cisco IOS Release 12.2(20)S6, FPGA does not upgrade automatically when an FPGA mismatch is detected. Furthermore, the user is not prompted for an FPGA upgrade when the default settings are maintained. If you want your Cisco 7304 router to upgrade FPGA automatically when an FPD mismatch is detected, enter the following command:

Command

Purpose

Router(config)# upgrade fpga force

Instructs the router to upgrade FPGA automatically when an FPGA mismatch is detected.

Enabling FPGA Prompting (Cisco IOS Release 12.2(20)S6 Onward)

Starting in Cisco IOS Release 12.2(20)S6, FPGA does not upgrade automatically when an FPGA mismatch is detected. Furthermore, the user is not prompted for an FPGA upgrade when the default settings are maintained. If you would like to be prompted to upgrade FPGA when an FPGA mismatch is detected, enter the following command:

Command

Purpose

Router(config)# upgrade fpga prompt

Instructs the router to post a prompt asking if you would like to upgrade FPGA when an FPGA mismatch is detected.

Setting Automatic FPGA Upgrades (Cisco IOS Release 12.2(20)S4 and 12.2(20)S5 Only)

If you want a Cisco 7304 router to automatically upgrade FPGA when an FPGA incompatibility is detected and you are running Cisco IOS Release 12.2(20)S4 or 12.2(20)S5, enter the following command:

Command

Purpose

Router(config)# no upgrade fpga prompt

Disables the prompt that asks if you would like to upgrade FPGA when an FPGA incompatibility is detected. When this prompt is disabled, an FPGA upgrade is automatically performed when an FPGA incompatibility is detected.

The no upgrade fpga prompt setting can only be used in Cisco IOS Release 12.2(20)S4 and 12.2(20)S5. In Cisco IOS Release 12.2(20)S6 onward, FPGA prompting is disabled by default, but an FPGA upgrade will not occur because FPGA prompting is disabled. Enabling FPGA prompting only enables a prompt when an FPGA mismatch is detected by the system FPGA version check. FPGA upgrades can be forced when an FPGA mismatch is detected by configuring the upgrade fpga force command. The no upgrade fpga command is used to disable both forced FPGA upgrades and FPGA prompting, so no upgrade fpga prompt command is no longer available after Cisco IOS Release 12.2(20)S6, but FPGA prompting can be disabled using no upgrade fpga.

Manually Starting the FPGA Image Update

To manually start the FPGA image update process on a line card, processor, or jacket card on a Cisco 7304 router, enter the following command in privileged EXEC mode:

:
Command

Purpose
Router# upgrade fpga all
The following board(s) have an FPGA image that is different
from the IOS bundled FPGA image
                          HARDWARE        FPGA VERSION ESTIMATED TIME
SLOT  FPGA                VERSION    CURRENT    IOS BUNDLED    TO UPDATE
----  ----                --------   -------    ----------- --------------
 0    NPEG100              01.00      02.04        02.05       up to 12 minutes
 5    6T3                  03.03      00.20        00.21       up to 12 minutes
Upgrade slot 0 NPEG100 FPGA? [y/n]n
%Warning:FPGA update skipped
Slot 0 NPEG100 FPGA may contain incompatible FPGA version.
This may cause system to be unstable.
00:07:54:%PLATFORM-6-FPGAUPDSKIP:Slot 0 NPEG100 FPGA update skipped.
Upgrade slot 5 LC FPGA? [y/n]y
The card in slot 5 should be reloaded for the new FPGA image to take effect.
Do you want to reload the card? [Y/N]y
Slot 5 LC FPGA update in process
PLEASE DO NOT INTERRUPT DURING FPGA UPDATE PROCESS
OR NEXT RELOAD MAY CRASH THE SYSTEM
FPGA flash update in progress
Erasing (this may take a while)...
Programming...
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
CCCCCCCCCCCC
Verifying FPGA flash
  Reading from FPGA 
flash...vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
vvvvvvvvvvvvvvDone
  Comparing with the source file...Passed
Slot 5 LC FPGA successfully updated from version 00.20 to version 00.21
00:20:27:%PLATFORM-6-FPGAUPDSUCCESS:Slot 5 LC FPGA successfully updated from 
version 00.20 to 00.21.
Starts the FPGA update process.

Caution Do not power cycle the router during the update process.

Note the difference between the current and bundled FPGA image versions. When there is a difference between the current version and the bundled version, you should make an extra effort to update the FPGA image.

Note the times necessary for performing the FPGA image update before deciding to proceed. Traffic disruptions often occur to a traffic passing hardware that is upgrading FPGA, so you may want to give this fact some consideration before upgrading FPGA.

In this example, only the T3 linecard FPGA upgrade is accepted.
Verifying the FPGA Version

This section describes the following topics:

•FPGA Verification Steps (Cisco IOS Release 12.2(20)S6 Onward)

•Verifying Status of an In-Progress FPGA Upgrade

•FPGA Verification Steps (Prior to Cisco IOS Release 12.2(20)S6)

FPGA Verification Steps (Cisco IOS Release 12.2(20)S6 Onward)

To check the current FPGA versions for hardware on your router, enter the show c7300 command to check the FPGA version. Note that the output for this command provides the following:

•Bundled FPGA version—This is the FPGA version for the specified hardware in the Cisco IOS software image.

•Flash FPGA version—This is the FPGA version for the specified hardware in Flash memory. During an FPGA upgrade, the FPGA information is first transferred from the Cisco IOS software to Flash memory. The last step in the process is getting the FPGA information from Flash memory to the hardware. The FPGA goes from Flash memory to hardware when the hardware is reloaded (or when the system is reloaded if the FPGA on a processor is being upgraded). If the bundled and Flash FPGA versions match when the current FPGA does not match, the hardware must be reloaded to complete the FPGA upgrade. If the bundled FPGA version does not match both the Flash and current FPGA versions, an entire FPGA upgrade must occur.

•Current FPGA version—This is the FPGA version on the hardware. If this version does not match the bundled version, you should upgrade the FPGA.

In the example below, the FPGA for the NPE-G100 in slot 0 and the T3 line card installed in slot 5 need to be upgraded. Note that the "*" is used to indicate that an FPGA update is necessary, and that the "#" is used to indicate that the hardware needs to be reloaded to complete an FPGA upgrade.
Router# show c7300
Slot      Card Type           Status          Insertion time
----      ---------           ------          --------------
0,1       NPEG100 (Active)    Up              00:06:28 ago
2,3       NPEG100 (Standby)   Down            00:06:28 ago
4         7304-MSC-100        Active          00:06:25 ago
5         6T3                 Active          00:06:24 ago
FPGA information:
                         Hardware            FPGA version
Slot Card Type           Version     Bundled    Flash    Current
---- ---------           --------    -------   -------   -------
*0   NPEG100              01.00       02.05     02.04     02.04
 4   7304-MSC-100         00.18       00.24     00.24     00.24
*5   6T3                  03.03       00.21     00.20     00.20
* - Card needs an FPGA update
# - Card needs to be reloaded for the new FPGA to take effect
Verifying Status of an In-Progress FPGA Upgrade

The show upgrade fpga progress command can be entered to see various information about an in-progress upgrade, including the approximate amount of time needed to complete the upgrade and the approximate amount of time taken during the current upgrade.

Note The "Time Needed to update" estimate provided in this output is based on the amount of time the specified hardware would need to upgrade at a time when the router was not passing traffic. An FPGA upgrade for a router passing traffic on a live network would take significantly longer to upgrade than the estimate given in this output.
The increased time required to upgrade FPGA is a reason why Cisco Systems recommends upgrading FPGA during maintenance windows and not on routers passing traffic in live networks.
Router# show upgrade fpga progress
FPGA image update progress information:
  Slot 0, FPGA name = NPEG100
  Hardware version = 01.00
  Current FPGA version = 02.04
  New FPGA version = 02.05
  Time needed to update = 00:12:00 (approximate)
Actual time taken so far = 00:01:47

FPGA Verification Steps (Prior to Cisco IOS Release 12.2(20)S6)

To check the current FPGA image versions for the hardware on your router, follow the steps below:

Step 1 Enter the show c7300 command to display information about incompatible FPGAs in your system. When the bundled and current FPGA image versions are the same, the FPGA image versions are not displayed. The following output is for a system with some incompatible FPGAs:
Router# show c7300
Slot Card Type Status Insertion time
---- --------- ------ --------------
0,1 NSE-100 Active 00:10:08 ago
2 1PA Card Carrier Active 00:01:46 ago
4 4OC3-POS Active 00:09:42 ago
System is compliant with hardware configuration guidelines.
All the FPGAs in the system are up-to-date
Network IO Interrupt Throttling:
throttle count=1, timer count=1
active=0, configured=1
netint usec=3999, netint mask usec=200
Step 2 Enter the show diag slot command to determine the current FPGA image version on a 7300-CC-PA:
Slot 2:is a PA CC with the following PA in its slot0:
Slot 0:
        ATM WAN DS3 Port adapter, 1 port
        Port adapter is analyzed
        Port adapter insertion time 00:01:00 ago
        EEPROM contents at hardware discovery:
        Hardware revision 2.0           Board revision UNKNOWN
        Serial number     24143406      Part number    73-2432-05
        Test history      0x0           RMA number     00-00-00
        EEPROM format version 1
        EEPROM contents (hex):
          0x20:01 5B 02 00 01 70 66 2E 49 09 80 05 00 00 00 00
          0x30:01 00 00 00 FF FF FF 00 FF FF FF FF FF FF FF FF
        PA Card Carrier Line Card, 1 port
        Line Card state:Active
        Insertion time:00:01:27 ago
        Bandwidth points:44736
        EEPROM contents at hardware discovery:
        Hardware Revision        :1.0
        Unknown Field (type 0046):00 00
        PCB Serial Number        :CAT06440ATR
        Part Number              :73-8261-02
        Board Revision           :A0
        Fab Version              :02
        RMA Test History         :00
        RMA Number               :0-0-0-0
        RMA History              :00
        Deviation Number         :0-0
        Product Number           :7300-CC-PA
        Top Assy. Part Number    :68-1910-02
        Manufacturing Test Data  :00 00 00 00 00 00 00 00
        Field Diagnostics Data   :00 00 00 00 00 00 00 00
        Calibration Data         :Minimum:0 dBmV, Maximum:0 dBmV
              Calibration values :
        EEPROM format version 4
        EEPROM contents (hex):
          0x00:04 FF 40 03 C3 41 01 00 46 00 00 C1 8B 43 41 54
          0x10:30 36 34 34 30 41 54 52 82 49 20 45 02 42 41 30
          0x20:02 02 03 00 81 00 00 00 00 04 00 80 00 00 00 00
          0x30:CB 94 37 33 30 30 2D 43 43 2D 50 41 20 20 20 20
          0x40:20 20 20 20 20 20 87 44 07 76 02 C4 08 00 00 00
          0x50:00 00 00 00 00 C5 08 00 00 00 00 00 00 00 00 C8
          0x60:09 00 00 00 00 00 00 00 00 00 F3 00 41 01 08 F6
          0x70:48 43 34 F6 48 43 34 02 31 04 B0 64 32 28 37 26
          0x80:05 DC 64 32 28 37 26 09 C4 64 32 28 32 DD 0C E4
          0x90:64 32 28 43 24 14 1E 64 32 28 65 BA 2E E0 AA 82
          0xA0:64 F4 24 D1 20 AA 82 64 80 EF FE 02 E9 2B FF FF
          0xB0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xC0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xD0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xE0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xF0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
        FPGA information:
          Current FPGA version     :01.00
          IOS bundled FPGA version :01.00
Enter the show diag slot command to determine the current FPGA image version on a line card or a processor:
Router# show diag 0
Slot 0:
        OC48 POS Single Mode Short Reach Line Card, 1 port
        Line Card state:Active
        .
        .
        .
        FPGA information:
          Current FPGA version     :0.13
          IOS bundled FPGA version :0.12
Troubleshooting Tips

Please pay particular attention to the "Restrictions and Important Notes Regarding FPGA" section if you run into an issue to see if your issue is mentioned.

With the introduction of the FPGA Bundling and Update feature, you may see the error messages detailed below.

•If your system has a Cisco IOS image running as a boot helper, the FPGA images are not updated. The following message is displayed when the Cisco IOS boot helper detects incompatible FPGA images in the system:
The FPGA of following board(s) may be incompatible with the bootloader
The interface(s) may be unstable during boot up process
SLOT  FPGA                CURRENT VERSION  REQUIRED VERSION
                           ON THE BOARD     FOR BOOTLOADER
----  ----                ---------------  ----------------
 0    NSE100 (MB)              00.03             00.12    
 0    NSE100 (DB)              00.03             00.10    
The FPGA of following board(s) may be incompatible with the bootloader
The interface(s) may be unstable during boot up process
SLOT  FPGA                CURRENT VERSION  REQUIRED VERSION
                           ON THE BOARD     FOR BOOTLOADER
----  ----                ---------------  ----------------
 4    OC48 POS                 00.13             00.12 
•If your system has an old version of the FPGA image on the NSE motherboard (MB), the NSE daughterboard (DB) and a line card and you load a Cisco IOS image, on bootup the following message is displayed:
The following board(s) may have incompatible FPGA(s) and may
need an upgrade or downgrade.
Please note the board(s) will be reset after FPGA update.
In the case of NSE, it will reload the whole system.
SLOT  FPGA                CURRENT VERSION  BUNDLED VERSION  ESTIMATED TIME TO
                           ON THE BOARD         IN IOS            UPDATE     
----  ----                ---------------  ---------------  -----------------
 0    NSE100 (MB)              00.03            00.12       up to 15 minutes
 0    NSE100 (DB)              00.03            00.10       up to 6 minutes
Upgrade slot 0 NSE MB FPGA? [y/n]n
If you enter "n", the following error message is displayed:
%Warning:FPGA update skipped
Slot 0 NSE MB FPGA may contain an incompatible FPGA version.
This may cause system to be unstable.
Upgrade slot 0 NSE DB FPGA? [y/n]n
If you enter "n", the following error message is displayed:
%Warning:FPGA update skipped
Slot 0 NSE DB FPGA may contain an incompatible FPGA version.
This may cause system to be unstable.
The following board(s) may have incompatible FPGA(s) and may
need an upgrade or downgrade
Please note the board(s) will be reset after FPGA update.
In the case of NSE, it will reload the whole system.
SLOT  FPGA                CURRENT VERSION  BUNDLED VERSION  ESTIMATED TIME TO
                           ON THE BOARD         IN IOS            UPDATE     
----  ----                ---------------  ---------------  -----------------
 4    OC48 POS                 00.13            00.12       up to 5 minutes
Downgrade slot 4 LC FPGA? [y/n]n
If you enter "n", the following error message is displayed:
%Warning:FPGA update skipped
Slot 4 LC FPGA may contain incompatible FPGA version.
This may cause system to be unstable.
00:00:15:%PLATFORM-6-FPGAUPDSKIP:Slot 0 NSE MB FPGA update skipped.
00:00:16:%PLATFORM-6-FPGAUPDSKIP:Slot 0 NSE DB FPGA update skipped.
00:00:18:%PLATFORM-6-FPGAUPDSKIP:Slot 4 LC FPGA update skipped.
•If the FPGA update is skipped due to no response from the user to the FPGA update prompt, then the following message is displayed on the console once every five minutes (on routers running pre-Cisco IOS Release 12.2(20)S6 software only):
%Warning: system FPGA update skipped due to no user response.
The system may contain incompatible FPGA image(s).
Please use 'upgrade fpga all' command under privileged EXEC mode to manually start the 
FPGA version check and update process for the entire system.
For more troubleshooting information, see the Cisco 7304 Router Troubleshooting documentation.

Monitoring and Maintaining the Cisco 7304 Router

Use the following commands to monitor and maintain the Cisco 7304 router:

Command

Purpose

Router# show c7300

Displays the types of cards installed in your system, including FPGA information.

Router# show c7300 errorlog {slot slot-number | all}

Displays information about errors on the router.

•slot-number—Displays errors for hardware in a particular slot.

•all—Displays errors for hardware in all slots.

Router# show c7300 pxf accounting

Displays the number of packets entering or exiting the PXF processors. Displays a count of packets dropped by the PXF processors.

Router# show c7300 pxf interfaces

Displays the status of various interfaces known to the PXF processors.

Router# show diag [slot-number | chassis]

Displays specific diagnostic information about each line card and other components in your system.

•(Optional) slot-number—Displays diagnostic information about a particular line card.

•(Optional) chassis—Displays diagnostic information about the backplane, power supplies, and fan modules.

Router# show environment

Displays reports of the current environmental system status.

Router# show upgrade fpga progress

Displays information about an in-progress FPGA upgrade.

Router# show version

Displays the configuration of the system hardware, the number of each interface type installed, the Cisco IOS software version, the names and sources of configuration files, and the boot images. Displays the configuration of the ROM monitor.

Configuration Examples

This section provides the following configuration examples:

•Manually Updating FPGA (Cisco IOS Release 12.2(20)S6 or later)

•FPGA Image Update after a Line Card OIR Example (Prior to Cisco IOS Release 12.2(20)S6)

•Forcing Automatic FPGA Updates Example

•Enabling FPGA Prompting Example

Note Cisco Systems recommends performing FPGA upgrades during maintenance windows and not on active routers in live networks. There are several reasons to not perform FPGA upgrades on live routers, including traffic disruption and longer required times to upgrade FPGA.
Please keep this recommendation in mind before upgrading FPGA on your Cisco 7304 router.

Manually Updating FPGA (Cisco IOS Release 12.2(20)S6 or later)

In the following example, the NPE-G100 processor and the 6T3 line card both require an FPGA upgrade. In this example, the line card upgrade is begun but the NPE-G100 upgrade is not performed.
Router# upgrade fpga all
The following board(s) have an FPGA image that is different
from the IOS bundled FPGA image
                          HARDWARE        FPGA VERSION ESTIMATED TIME
SLOT  FPGA                VERSION    CURRENT    IOS BUNDLED    TO UPDATE
----  ----                --------   -------    ----------- --------------
 0    NPEG100              01.00      02.04        02.05       up to 12 minutes
 5    6T3                  03.03      00.20        00.21       up to 12 minutes
Upgrade slot 0 NPEG100 FPGA? [y/n]n
%Warning:FPGA update skipped
Slot 0 NPEG100 FPGA may contain incompatible FPGA version.
This may cause system to be unstable.
00:07:54:%PLATFORM-6-FPGAUPDSKIP:Slot 0 NPEG100 FPGA update skipped.
Upgrade slot 5 LC FPGA? [y/n]y
The card in slot 5 should be reloaded for the new FPGA image to take effect.
Do you want to reload the card? [Y/N]n
Slot 5 LC FPGA update in process
PLEASE DO NOT INTERRUPT DURING FPGA UPDATE PROCESS
OR NEXT RELOAD MAY CRASH THE SYSTEM
FPGA flash update in progress
Erasing (this may take a while)...
Programming...
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
Verifying FPGA flash
  Reading from FPGA 
flash...vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
vvvDone
  Comparing with the source file...Passed
Slot 5 LC FPGA successfully updated from version 00.20 to version 00.21
00:20:27:%PLATFORM-6-FPGAUPDSUCCESS:Slot 5 LC FPGA successfully updated from version 00.20 
to 00.21.
00:20:27:%PLATFORM-4-FPGAUPD_RELOAD_SKIP:After the FPGA update, the card in slot 5 was not 
reloaded. The card should be reloaded for the new FPGA image to take effect.
The following example shows how to manually start the FPGA image update process for an NSE for a router running a pre-Cisco IOS Release 12.2(20)S6 software image:
Router# upgrade fpga all
The following board(s) may have incompatible FPGA(s) and may
need an upgrade or downgrade.
Please note the board(s) will be reset after FPGA update.
In the case of NSE, it will reload the whole system.
SLOT  FPGA                CURRENT VERSION  BUNDLED VERSION  ESTIMATED TIME TO
                           ON THE BOARD         IN IOS            UPDATE     
----  ----                ---------------  ---------------  -----------------
 0    NSE100 (MB)              00.03            00.12       up to 15 minutes
 0    NSE100 (DB)              00.03            00.10       up to 6 minutes
Upgrade slot 0 NSE MB FPGA? [y/n]y
Upgrade slot 0 NSE DB FPGA? [y/n]y
Slot 0 NSE MB FPGA update in process
PLEASE DO NOT INTERRUPT DURING FPGA UPDATE PROCESS
OR NEXT RELOAD MAY CRASH THE SYSTEM
FPGA flash update in progress
Erasing (this may take a while)...
Programming...
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
Verifying FPGA flash
  Reading from FPGA flash...vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv 
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv 
vvvvvvvvvvvvvDone
Comparing with the source file...Passed
Slot 0 NSE MB FPGA successfully updated from version 0.3 to version 0.12
Slot 0 NSE DB FPGA update in process
PLEASE DO NOT INTERRUPT DURING FPGA UPDATE PROCESS
OR NEXT RELOAD MAY CRASH THE SYSTEM
FPGA flash update in progress
Erasing (this may take a while)...
Programming...
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
Verifying FPGA flash
  Reading from FPGA flash...vvvvvvvvvvvvvvvvvvvvvvDone
  Comparing with the source file...Passed
Slot 0 NSE DB FPGA successfully updated from version 0.3 to version 0.10
System will be reloaded now for the new FPGA to take effect...

FPGA Image Update after a Line Card OIR Example (Prior to Cisco IOS Release 12.2(20)S6)

The following example shows sample output of an FPGA image update after a line card OIR. In this example, the OC48 POS line card is inserted and you are prompted to update the FPGA image for that line card. Note that this is pre-Cisco IOS Release 12.2(20)S6 output. The update does not take place because there is no response to the update prompt:
00:03:15:%OIR-6-INSCARD:Card inserted in slot 4, interfaces administratively shut down
The following board(s) may have incompatible FPGA(s) and may
need an upgrade or downgrade.
Please note the board(s) will be reset after FPGA update.
In the case of NSE, it will reload the whole system.
SLOT  FPGA                CURRENT VERSION  BUNDLED VERSION  ESTIMATED TIME TO
                           ON THE BOARD         IN IOS            UPDATE     
----  ----                ---------------  ---------------  -----------------
 4    OC48 POS                 00.13            00.12       up to 5 minutes
Downgrade slot 4 LC FPGA? [y/n]
%Warning: For slot 4 and up, system FPGA update skipped due to no user response.
The system may contain incompatible FPGA image(s).
Please use 'upgrade fpga all' command under privileged EXEC mode to manually start the 
FPGA version check and update process for the entire system.
00:05:16:%PLATFORM-3-FPGAUPDUITIMEOUT:System FPGA update skipped for slot 4 and up due to 
no user response.
Forcing Automatic FPGA Updates Example

The following example shows how to configure a Cisco 7304 router running Cisco IOS Release 12.2(20)S6 or later to upgrade FPGA when an FPGA mismatch is detected.
Router(config)# upgrade fpga force
Enabling FPGA Prompting Example

The following example shows how to configure a Cisco 7304 router running Cisco IOS Release 12.2(20)S6 or later to prompt the user for an FPGA upgrade when an FPGA mismatch is detected.

Router(config)# upgrade fpga prompt

Command Reference

This section documents new and modified commands. All other commands used with this feature are documented in the Cisco IOS Release 12.1 command reference publications and in the document Cisco 7 300 Series Platform-Specific Commands.

•show c7300

•show diag

•show upgrade fpga progress

•upgrade fpga

•upgrade fpga all

show c7300

To display the types of cards (processors, line cards, and jacket cards) installed in a Cisco 7304 router, use the show c7300 command in privileged EXEC mode.

show c7300
Syntax Description

This command has no arguments or keywords.

Defaults

No default behavior or values

Command Modes

Privileged EXEC

Command History

Release

Modification

12.1(9)EX

This command was introduced.

12.1(10)EX

The output of this command was enhanced to include information about Field-Programmable Gate Array (FPGA) images.

12.2(11)YZ

Support was added for the 7300-CC-PA.

12.2(20)S

This command was introduced on Cisco 7304 routers running Cisco IOS Release 12.2 S.

12.2(20)S2

Support was added for MSCs and SPAs.

12.2(20)S6

This command was modified to show more FPGA information.

Usage Guidelines

This command displays the types of cards (processors, line cards, and jacket cards) and information about FPGA images in a Cisco 7304 router. This command also displays if your system is in compliance with line card configuration guidelines. Empty slots are not displayed in the show c7300 command.

If your system contains an unsupported line card or processor with no matching bundled FPGA image in Cisco IOS, then this command displays "None" instead of the bundled FPGA version number.

If the FPGA version is returned as "invalid" or "unknown," your hardware will not operate until you upgrade FPGA. Use the upgrade fpga all command to upgrade FPGA.

In Cisco IOS Release 12.2(20)S6, a feature was introduced with the upgrade fpga all command that allows users to upgrade FPGA without completing the upgrade by reloading the card. The process for upgrading FPGA requires the following steps:

•Sending the FPGA image that is bundled in Cisco IOS to Flash memory. The Cisco IOS-bundled FPGA image is transferred to Flash memory as the first step in the FPGA upgrade.

•Sending the FPGA image that has now been transferred into Flash memory to the hardware that requires the FPGA upgrade. This step is completed when the line card or the jacket card is reloaded, or when the router is reloaded if the hardware component is a processor.

Because the hardware was automatically reloaded as part of the pre-Cisco IOS Release 12.2(20)S6 FPGA upgrade process, the user never had to know about the FPGA version in Flash memory before Cisco IOS Release 12.2(20)S6. Because this version is now relevant, the FPGA version stored in Flash memory is now part of the show c7300 command output. The show c7300 output also contains the FPGA version bundled with Cisco IOS and the current FPGA version on the hardware.

In Cisco IOS Release 12.2(20)S6, all hardware with the FPGA was shown in the show c7300 command output. Previously, FPGA information was only shown for hardware that had an FPGA mismatch.

Examples

The following example shows show c7300 output for a router running Cisco IOS Release 12.2(20)S6 or later. In this example, the NPE-G100 and the 6T3 line card need an FPGA upgrade because the bundled version is different from the current version. Note also that the FPGA version in Flash memory is also part of the command output.
Router# show c7300
Slot      Card Type           Status          Insertion time
----      ---------           ------          --------------
0,1       NPEG100 (Active)    Up              00:06:28 ago
2,3       NPEG100 (Standby)   Down            00:06:28 ago
4         7304-MSC-100        Active          00:06:25 ago
5         6T3                 Active          00:06:24 ago
FPGA information:
                         Hardware            FPGA version
Slot Card Type           Version     Bundled    Flash    Current
---- ---------           --------    -------   -------   -------
*0   NPEG100              01.00       02.05     02.04     02.04
 4   7304-MSC-100         00.18       00.24     00.24     00.24
*5   6T3                  03.03       00.21     00.20     00.20
* - Card needs an FPGA update
# - Card needs to be reloaded for the new FPGA to take effect
The following pre-Cisco IOS Release 12.2(20)S6 example displays information about a Cisco 7304 router that has current FPGA images:
Router# show c7300
Slot      Card Type           Status          Insertion time
----      ---------           ------          --------------
0,1       NSE-100             Active          00:13:16 ago
4         1OC48-POS           Active          00:01:43 ago
System is compliant with hardware configuration guidelines.
All the FPGAs in the system are up-to-date
Network IO Interrupt Throttling:
 throttle count=3, timer count=3
 active=0, configured=1
 netint usec=3999, netint mask usec=200
The following example displays information about a Cisco 7304 router running a pre-Cisco IOS Release 12.2(20)S6 software image that has incompatible FPGA images that need to be updated. If your system contains an unsupported line card or processor with no matching bundled FPGA image in Cisco IOS, "None" is displayed instead of a bundled FPGA version number.
Router# show c7300
Slot      Card Type           Status          Insertion time
----      ---------           ------          --------------
0,1       NSE-100             Active          00:02:26 ago
4         6T3                 Active          00:02:23 ago
5         6T3                 Active          00:02:23 ago
System is compliant with hardware configuration guidelines.
%WARNING:The following FPGAs in the system may need an update.
Slot      Card Type           Current FPGA    Bundled FPGA    
----      ---------           ------------    ------------    
0         NSE-100 (MB)        0.12            None            
Network IO Interrupt Throttling:
 throttle count=0, timer count=0
 active=0, configured=1
 netint usec=3999, netint mask usec=200
Related Commands

Command

Description

show c7300 errorlog

Displays error information on a Cisco 7304 router.

show diag

Displays hardware information for any slot or the chassis.

show version

Displays the configuration of the system hardware, the number of each interface type installed, the Cisco IOS software version, the names and sources of configuration files, and the boot images. Displays the configuration of the ROM monitor.

show diag

To display hardware and diagnostic information for a networking device, a line card, a processor, a jacket card, or a chassis, use the show diag command in privileged EXEC configuration mode.

show diag [slot-number] [details | summary]
Cisco 7304 Router

show diag [slot-number | chassis | subslot slot/subslot] [details | summary]
Shared Port Adapters

show diag [subslot slot/subslot] [details | summary]
Syntax Description

slot-number

(Optional) Slot number of the interface. If a slot number is not specified, diagnostic information for all slots is displayed.

chassis

(Optional) Cisco 7304 Router

Specifies the display of diagnostic information about the backplane, power supplies, and fan modules.

subslot slot/subslot

(Optional) Shared Port Adapters

Specifies the display of diagnostic information about the shared port adapter (SPA), where:

•slot—Chassis slot number.

Refer to the appropriate hardware manual for slot information. For SIPs, refer to the platform-specific SPA hardware installation guide or the corresponding "Identifying Slots and Subslots for SIPs and SPAs" topic in the platform-specific SPA software configuration guide.

•subslot—Secondary slot number on a SIP where a SPA is installed.

Refer to the platform-specific SPA hardware installation guide and the corresponding "Specifying the Interface Address on a SPA" topic in the platform-specific SPA software configuration guide for subslot information.

details

(Optional) Displays more details than the normal show diag output.

summary

(Optional) Displays a summary (one line per slot) of the chassis.

Defaults

No default behavior or values

Command Modes

Privileged EXEC

Command History

Release

Modification

11.1CA

This command was introduced.

11.2

This command was integrated into Cisco IOS Release 11.2.

11.2P

This command output was modified for the PA-12E/2FE port adapter, PA-E3 port adapter, and PA-T3 port adapter.

11.2GS

This command was implemented on the Cisco 12000 series Gigabit Switch Routers (GSRs).

11.3 XA

This command was integrated in Cisco IOS Release 11.3 XA.

12.0

This command was implemented on the Cisco AS5300.

12.0(5)XQ

This command was implemented on the Cisco 1750 router.

12.0(7)T

This command was integrated into Cisco IOS Release 12.0(7)T.

12.1(9)EX

This command was introduced on the Cisco 7300 series routers, and the slot-number argument and chassis keyword were added.

12.1(10)EX

This command was enhanced to display information about Field-Programmable Gate Array (FPGA) image versions on installed NSEs and line cards on Cisco 7304 routers.

12.2(11)YZ

Support was added for the 7300-CC-PA.

12.2(8)T

This command was implemented for AIC and WIC cards on the Cisco 2600 series routers and the Cisco 3600 series routers.

12.2(13)T

This command was implemented for the AIM-VPN/EPII and AIM-VPN/HPII cards on the Cisco 2691, Cisco 3660, Cisco 3725, and Cisco 3745.

12.2(15)ZJ

This command was implemented for the AIM-VPN/BPII card on the Cisco 2610XM, Cisco 2611XM, Cisco 2620XM, Cisco 2621XM, Cisco 2650XM, and Cisco 2651XM.

12.2(18)S

This command was integrated into Cisco IOS Release 12.2(18)S and implemented on the Cisco 7304 router.

12.3(4)T

Support for the AIM-VPN/BPII card on the Cisco 2600XM series was integrated into Cisco IOS Release 12.3(4)T.

12.2(20)S2

This command was integrated into Cisco IOS Release 12.2(20)S2 and the subslot slot/subslot keyword and arguments were added to support SPAs on the Cisco 7304 router.

12.0(31)S

This command was integrated into Cisco IOS Release 12.0(31)S and the subslot slot/subslot keyword and arguments were added to support SIPs and SPAs on the Cisco 12000 series router.

12.4(4)T

This command was implemented for the HWIC-1ADSL and HWIC-1ADSLI interface cards on the following platforms: Cisco 1800 (modular) series, Cisco 2800 series, and Cisco 3800 series.

Usage Guidelines

Use this command to determine the type of hardware installed in your router, and to show detailed hardware information and EEPROM version information.

This command displays information for the motherboard, WAN interface cards (WICs), voice interface cards (VICs), high-speed WICs (HWICs), ATM interface cards (AICs), advanced integration modules (AIMs), port adapters, shared port adapters (SPAs), modular services cards (MSCs), and SPA interface processors (SIPs).

Cisco 7304 Router Usage Guidelines

For the Cisco 7304 router, this command applies to NSEs, line cards, MSCs, and SPAs.

•To display hardware information for an NSE, line card, or MSC in the specified slot, use the slot-number argument. For MSCs, information about the MSC and each of its installed SPAs is displayed.

•To display hardware information about the backplane, power supplies, and fan modules, use the chassis keyword.

Shared Port Adapter Usage Guidelines

•To display hardware information for an MSC or SIP only in a specified slot, use the slot-number argument.

•To display hardware information for a SPA only, use the show diag subslot slot/subslot version of this command.

Examples

1-Port T3 Serial Port Adapter: Example

The following is sample output from the show diag command for a 1-port T3 serial port adapter in chassis slot 1 on a Cisco 7200 series router:
Router# show diag 1
Slot 1:
        Physical slot 1, ~physical slot 0xE, logical slot 1, CBus 0
        Microcode Status 0x4
        Master Enable, LED, WCS Loaded
        Board is analyzed
        Pending I/O Status: None
        EEPROM format version 1
        VIP2 controller, HW rev 2.4, board revision D0
        Serial number: 04372053  Part number: 73-1684-03
        Test history: 0x00        RMA number: 00-00-00
        Flags: cisco 7000 board; 7500 compatible
        EEPROM contents (hex):
          0x20: 01 15 02 04 00 42 B6 55 49 06 94 03 00 00 00 00
          0x30: 68 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
        Slot database information:
        Flags: 0x4      Insertion time: 0x14A8 (5d02h ago)
        Controller Memory Size: 16 MBytes DRAM, 1024 KBytes SRAM
        PA Bay 0 Information:
                T3 Serial PA, 1 ports
                EEPROM format version 1
                HW rev FF.FF, Board revision UNKNOWN
                Serial number: 4294967295  Part number: 255-65535-255
Cisco 12000 Series Internet Router: Example

The following is sample output from the show diag command on a Cisco 12000 series Internet router:
Router# show diag 3
SLOT 3  (RP/LC 3 ): 4 Port Packet Over SONET OC-3c/STM-1 Multi Mode
  MAIN: type 33,  00-0000-00 rev 70 dev 0
        HW config: 0x01    SW key: 00-00-00
  PCA:  73-2147-02 rev 94 ver 2
        HW version 1.0  S/N 04499695
  MBUS: MBUS Agent (1)  73-2146-05 rev 73 dev 0
        HW version 1.1  S/N 04494882
        Test hist: 0x00    RMA#: 00-00-00    RMA hist: 0x00
  DIAG: Test count: 0x05000001    Test results: 0x00000000
  MBUS Agent Software version 01.27 (RAM) using CAN Bus A
  ROM Monitor version 00.0D
  Fabric Downloader version used 00.0D (ROM version is 00.0D)
  Board is analyzed 
  Board State is Line Card Enabled (IOS  RUN )
  Insertion time: 00:00:10 (00:04:51 ago)
  DRAM size: 33554432 bytes
  FrFab SDRAM size: 67108864 bytes
  ToFab SDRAM size: 16777216 bytes
The following is sample output from the show diag command with the summary keyword:
Router# show diag summary
SLOT 0  (RP/LC 0 ): Route Processor
SLOT 2  (RP/LC 2 ): 4 Port Packet Over SONET OC-3c/STM-1 Single Mode
SLOT 4  (RP/LC 4 ): 4 Port Packet Over SONET OC-3c/STM-1 Single Mode
SLOT 7  (RP/LC 7 ): 4 Port Packet Over SONET OC-3c/STM-1 Single Mode
SLOT 9  (RP/LC 9 ): 4 Port Packet Over SONET OC-3c/STM-1 Single Mode
SLOT 11 (RP/LC 11): 4 Port Packet Over SONET OC-3c/STM-1 Single Mode
SLOT 16 (CSC 0   ): Clock Scheduler Card
SLOT 17 (CSC 1   ): Clock Scheduler Card
SLOT 18 (SFC 0   ): Switch Fabric Card
SLOT 19 (SFC 1   ): Switch Fabric Card
SLOT 20 (SFC 2   ): Switch Fabric Card
SLOT 24 (PS A1   ): AC Power Supply
SLOT 26 (PS B1   ): AC Power Supply
SLOT 28 (TOP FAN ): Blower Module
SLOT 29 (BOT FAN ): Blower Module
The following is sample output from the show diag command with the details keyword:
Router# show diag 4 details 
SLOT 4  (RP/LC 4): 4 Port Packet Over SONET OC-3c/STM-1 Single Mode
  MAIN: type 33,  800-2389-01 rev 71 dev 16777215
        HW config: 0x00    SW key: FF-FF-FF
  PCA:  73-2275-03 rev 75 ver 3
        HW version 1.1  S/N 04529465
  MBUS: MBUS Agent (1)  73-2146-06 rev 73 dev 0
        HW version 1.1  S/N 04541395
        Test hist: 0xFF    RMA#: FF-FF-FF    RMA hist: 0xFF
  DIAG: Test count: 0x05000001    Test results: 0x00000000
  EEPROM contents (hex):
  00: 01 00 01 00  49 00 08 62  06 03 00 00  00 FF FF FF
  10: 30 34 35 34  31 33 39 35  FF FF FF FF  FF FF FF FF
  20: 01 01 00 00  00 00 00 FF  FF FF FF FF  FF FF FF FF
  30: A5 FF A5 A5  A5 A5 FF A5  A5 A5 A5 A5  A5 A5 A5 A5
  40: 00 21 01 01  00 49 00 08  E3 03 05 03  00 01 FF FF
  50: 03 20 00 09  55 01 01 FF  FF FF 00 FF  FF FF FF FF
  60: 30 34 35 32  39 34 36 35  FF FF FF FF  FF FF FF FF
  70: FF FF FF FF  FF FF FF FF  05 00 00 01  00 00 00 00
  MBUS Agent Software version 01.24 (RAM)
  Fabric Downloader version 00.0D
  Board is analyzed
  Flags: 0x4
  Board State is Line Card Enabled (IOS  RUN)
  Insertion time: 00:00:10 (00:04:51 ago)
  DRAM size: 33554432 bytes
  FrFab SDRAM size: 67108864 bytes
  ToFab SDRAM size: 16777216 bytes
ATM SAR AIM in a Cisco 3660: Example

The following is sample output from the show diag command for one ATM Segmentation and Reassembly (SAR) AIM in a Cisco 3660 router:
Router# show diag 0
3660 Chassis type: ENTERPRISE
c3600 Backplane EEPROM:
	Hardware Revision        : 1.0
	Top Assy. Part Number    : 800-04740-02
.
.
.
ATM AIM: 1
	ATM AIM module with SAR only (no DSPs)
	Hardware Revision        : 1.0
	Top Assy. Part Number    : 800-03700-01
	Board Revision           : A0
	Deviation Number         : 0-0
	Fab Version              : 02
	PCB Serial Number        : JAB9801ABCD
NM-AIC-64 Installed in a Cisco 2611: Example

The following is sample output from the show diag command for a Cisco 2611 router with the NM-AIC-64 installed.
Router# show diag 
Slot 0: 
C2611 2E Mainboard Port adapter, 2 ports 
Port adapter is analyzed  
Port adapter insertion time unknown 
EEPROM contents at hardware discovery: 
Hardware Revision : 2.3 
PCB Serial Number : JAD044808SG (1090473337) 
Part Number : 73-2840-13 
RMA History : 00 
RMA Number : 0-0-0-0 
Board Revision : C0 
Deviation Number : 0-0 
EEPROM format version 4 
EEPROM contents (hex): 
0x00: 04 FF 40 00 92 41 02 03 C1 18 4A 41 44 30 34 34 
0x10: 38 30 38 53 47 20 28 31 30 39 30 34 37 33 33 33 
0x20: 37 29 82 49 0B 18 0D 04 00 81 00 00 00 00 42 43 
0x30: 30 80 00 00 00 00 FF FF FF FF FF FF FF FF FF FF 
0x40: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 
0x50: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 
0x60: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 
0x70: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 
 
Slot 1: 
NM_AIC_64 Port adapter, 3 ports 
Port adapter is analyzed  
Port adapter insertion time unknown 
EEPROM contents at hardware discovery: 
Hardware Revision : 1.0 
Part Number : 74-1923-01 
Board Revision : 02 
PCB Serial Number : DAN05060012 
EEPROM format version 4 
EEPROM contents (hex): 
0x00: 04 FF 40 02 55 41 01 00 82 4A 07 83 01 42 30 32 
0x10: C1 8B 44 41 4E 30 35 30 36 30 30 31 32 FF FF FF 
0x20: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 
0x30: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 
0x40: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 
0x50: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 
0x60: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 
0x70: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 
Table 1 describes significant fields shown in the display.

Table 1 show diag (AIC) Field Descriptions

Field

Description

C2611 2E Mainboard Port adapter, 2 ports

Line card type; number of ports available.

Port adapter is analyzed

The system has identified the port adapter.

Port adapter insertion time

Elapsed time since insertion.

Hardware Revision

Version number of the port adapter.

PCB Serial Number

Serial number of the printed circuit board.

Part Number

Part number of the port adapter.

RMA History

Counter that indicates how many times the port adapter has been returned and repaired.

RMA Number

Return material authorization number, which is an administrative number assigned if the port adapter needs to be returned for repair.

Board Revision

Revision number (signifying a minor revision) of the port adapter.

Deviation Number

Revision number (signifying a minor deviation) of the port adapter.

EEPROM format version

Version number of the EEPROM format.

EEPROM contents (hex)

Dumps of EEPROM programmed data.

AIM-VPN in a Cisco 2611XM: Example

The following example shows how to obtain hardware information about an installed AIM-VPN on the Cisco 2611XM router.

Router# show diag 0

Encryption AIM 1:

Hardware Revision :1.0

Top Assy. Part Number :800-03700-01

Board Revision :A0

Deviation Number :0-0

Fab Version :02

PCB Serial Number :JAB9801ABCD

RMA Test History :00

RMA Number :0-0-0-0

RMA History :00

EEPROM format version 4

EEPROM contents (hex):

0x00:04 FF 40 03 0B 41 01 00 C0 46 03 20 00 0E 74 01

0x10:42 41 30 80 00 00 00 00 02 02 C1 8B 4A 41 42 39

0x20:38 30 31 41 42 43 44 03 00 81 00 00 00 00 04 00

0x30:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

0x40:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

0x50:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

0x60:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

0x70:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

Table 2 describes significant fields shown in the display.

Table 2 show diag (AIM-VPN) Field Descriptions

Field

Description

Hardware Revision

Version number of the port adapter.

Top Assy. Part Number

Part number of the port adapter.

Board Revision

Revision number (signifying a minor revision) of the port adapter.

Deviation Number

Revision number (signifying a minor deviation) of the port adapter.

PCB Serial Number

Serial number of the printed circuit board.

RMA Number

Return material authorization number, which is an administrative number assigned if the port adapter needs to be returned for repair.

RMA History

Counter that indicates how many times the port adapter has been returned and repaired.

EEPROM format version

Version number of the EEPROM format.

EEPROM contents (hex)

Dumps of EEPROM programmed data.

MSC-100 on the Cisco 7304 Router: Example

The following is sample output from the show diag slot-number version of the command for an MSC-100 located in slot number 4 on a Cisco 7304 router. Information about the MSC is followed by information for its associated SPAs:
Router# show diag 4
Slot 4:
        7304-MSC-100 SPA Carrier Card Line Card
        Line Card state: Active
        Insertion time: 00:08:49 ago
        Bandwidth points: 4000000
        EEPROM contents at hardware discovery:
        Hardware Revision        : 0.18
        Boot Time out            : 0000
        PCB Serial Number        : CSJ07288905
        Part Number              : 73-8789-01
        Board Revision           : A0
        Fab Version              : 02
        RMA Test History         : 00
        RMA Number               : 0-0-0-0
        RMA History              : 00
        Deviation Number         : 0-0
        Product Number           : 7304-MSC-100
        Top Assy. Part Number    : 68-1163-04
        Manufacturing Test Data  : 00 00 00 00 00 00 00 00
        Field Diagnostics Data   : 00 00 00 00 00 00 00 00
        Calibration Data         : Minimum: 0 dBmV, Maximum: 0 dBmV
              Calibration values :
        EEPROM format version 4
        EEPROM contents (hex):
          0x00: 04 FF 40 04 50 41 00 12 46 00 00 C1 8B 43 53 4A
          0x10: 30 37 32 38 38 39 30 35 82 49 22 55 01 42 41 30
          0x20: 02 02 03 00 81 00 00 00 00 04 00 80 00 00 00 00
          0x30: CB 94 37 33 30 34 2D 4D 53 43 2D 31 30 30 20 20
          0x40: 20 20 20 20 20 20 87 44 04 8B 04 C4 08 00 00 00
          0x50: 00 00 00 00 00 C5 08 00 00 00 00 00 00 00 00 C8
          0x60: 09 00 00 00 00 00 00 00 00 00 C7 7C F6 44 3F 30
          0x70: 00 00 00 00 00 00 00 00 00 00 00 00 02 EE FF C8
          0x80: C8 37 26 05 DC 64 28 1E 37 26 09 C4 64 32 28 32
          0x90: DD 0C E4 64 32 28 43 24 2E E0 AA 82 64 F4 24 00
          0xA0: 00 00 00 00 00 00 F0 2E FF FF FF FF FF FF FF FF
          0xB0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xC0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xD0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xE0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xF0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x100: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x110: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x120: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x130: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x140: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x150: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x160: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x170: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x180: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x190: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x1A0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x1B0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x1C0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x1D0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x1E0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x1F0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
        FPGA information:
          Current FPGA version     : 00.23
          IOS bundled FPGA version : 00.23
        CPLD version     : 01.02
Subslot 4/1:
        Shared port adapter: SPA-4FE-7304, 4 ports
        State: ok
        Insertion time: 00:15:13 ago
        Bandwidth: 400000 kbps
        EEPROM contents:
.
.
.
NSE-100 on the Cisco 7304 Router: Example

The following example displays diagnostic information about the NSE-100 in slot 0 of a Cisco 7304 router:
Router# show diag 0
Slot 0/1:
        NSE Card state:Primary
        Insertion time:00:03:47 ago
C7300 NSE Mainboard EEPROM:
        Hardware Revision        :2.3
        PCB Serial Number        :CAB0532JYYT
        Part Number              :73-5198-02
        Board Revision           :A0
        Fab Version              :02
        RMA Test History         :00
        RMA Number               :0-0-0-0
        RMA History              :00
        Deviation Number         :0-0
        Product Number           :7300-NSE-100        
        Top Assy. Part Number    :68-1002-02
        Manufacturing Test Data  :00 00 00 00 00 00 00 00 
        Field Diagnostics Data   :00 00 00 00 00 00 00 00 
        Calibration Data         :Minimum:0 dBmV, Maximum:0 dBmV
              Calibration values :
        EEPROM format version 4
        EEPROM contents (hex):
          0x00:04 FF 40 02 8B 41 02 03 C1 8B 43 41 42 30 35 33
          0x10:32 4A 59 59 54 82 49 14 4E 02 42 41 30 02 02 03
          0x20:00 81 00 00 00 00 04 00 80 00 00 00 00 CB 94 37
          0x30:33 30 30 2D 4E 53 45 2D 31 30 30 20 20 20 20 20
          0x40:20 20 20 87 44 03 EA 02 C4 08 00 00 00 00 00 00
          0x50:00 00 C5 08 00 00 00 00 00 00 00 00 C8 09 00 00
          0x60:00 00 00 00 00 00 00 C7 7C F6 44 3F 30 F6 44 3F
          0x70:30 F6 44 3F 30 00 00 00 00 07 08 64 32 28 37 26
          0x80:09 C4 5A 32 28 32 DD 0C E4 5A 2D 23 43 24 13 88
          0x90:64 32 28 65 BA 2E E0 AA 82 64 F4 24 00 00 00 00
          0xA0:00 00 00 EF 1C FF FF FF FF FF FF FF FF FF FF FF
          0xB0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xC0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xD0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xE0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xF0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
C7300 NSE Daughterboard EEPROM:
        Hardware Revision        :2.0
        PCB Serial Number        :CAB0533K3PP
        Part Number              :73-5673-03
        Board Revision           :A0
        Fab Version              :03
        RMA Test History         :00
        RMA Number               :0-0-0-0
        RMA History              :00
        Deviation Number         :0-0
        Product Number           :7300-NSE-100        
        Top Assy. Part Number    :68-1002-02
        Manufacturing Test Data  :00 00 00 00 00 00 00 00 
        Field Diagnostics Data   :00 00 00 00 00 00 00 00 
        Calibration Data         :Minimum:0 dBmV, Maximum:0 dBmV
              Calibration values :
        EEPROM format version 4
        EEPROM contents (hex):
          0x00:04 FF 40 02 8C 41 02 00 C1 8B 43 41 42 30 35 33
          0x10:33 4B 33 50 50 82 49 16 29 03 42 41 30 02 03 03
          0x20:00 81 00 00 00 00 04 00 80 00 00 00 00 CB 94 37
          0x30:33 30 30 2D 4E 53 45 2D 31 30 30 20 20 20 20 20
          0x40:20 20 20 87 44 03 EA 02 C4 08 00 00 00 00 00 00
          0x50:00 00 C5 08 00 00 00 00 00 00 00 00 C8 09 00 00
          0x60:00 00 00 00 00 00 00 C7 7C F6 44 3F 30 00 00 00
          0x70:00 00 00 00 00 00 00 00 00 06 72 64 1E 1C 37 26
          0x80:07 08 64 32 28 37 26 00 00 00 00 00 00 00 00 00
          0x90:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0xA0:00 00 00 FB BA FF FF FF FF FF FF FF FF FF FF FF
          0xB0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xC0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xD0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xE0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0xF0:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
        FPGA information:
          Current NSE MB FPGA version     :0.3
          IOS bundled NSE MB FPGA version :0.12
          Current NSE DB FPGA version     :0.3
          IOS bundled NSE DB FPGA version :0.10
Fault History Buffer:
7300 Software (C7300-IS-M), Experimental Version 12.1(20011206:191841) [user-ws1 179]
Compiled Tue 29-Jan-02 08:10 by 
Signal = 22, Code = 0x0, Uptime 00:00:48
$0 :FFFFFFFF, AT :47001098, v0 :10020028, v1 :0000006F
a0 :A0000000, a1 :00000005, a2 :00000001, a3 :10020028
t0 :00000028, t1 :3401E101, t2 :34018100, t3 :FFFF00FF
t4 :40332E68, t5 :43204650, t6 :70646174, t7 :69707065
s0 :FFFFFFFF, s1 :FFFFFFFF, s2 :FFFFFFFF, s3 :FFFFFFFF
s4 :FFFFFFFF, s5 :FFFFFFFF, s6 :FFFFFFFF, s7 :FFFFFFFF
t8 :00000000, t9 :00000000, k0 :3041D001, k1 :30410000
gp :FFFFFFFF, sp :41AA8F20, s8 :FFFFFFFF, ra :4036B6A4
EPC :4036B69C, SREG :3401E103, Cause :FFFFFFFF
Error EPC :FFFFFFFF, BadVaddr :FFFFFFFF
ROMMON Last Error Info:
count:19,  reason:reset
pc:0x4020BFBC,  error address:0x00000000
Stack Trace:
FP:0x00000000, PC:0x00000000
FP:0x00000000, PC:0x00000000
.
.
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Shared Port Adapters on the Cisco 7304 Router: Example

The following is sample output from the show diag subslot command for a 4-Port 10/100 Fast Ethernet SPA located in the bottom subslot (1) of the MSC that is installed in slot 4 on a Cisco 7304 router:
Router# show diag subslot 4/1
Subslot 4/1:
        Shared port adapter: SPA-4FE-7304, 4 ports
        Info: hw-ver=0x100, sw-ver=0x0 fpga-ver=0x0
        State: ok
        Insertion time: 23:20:42 ago
        Bandwidth: 400000 kbps
        EEPROM contents:
        Hardware Revision        : 1.0
        Boot Time out            : 0190
        PCB Serial Number        : JAB073204G5
        Part Number              : 73-8717-03
        73/68 Level Revision     : 01
        Fab Version              : 02
        RMA Test History         : 00
        RMA Number               : 0-0-0-0
        RMA History              : 00
        Deviation Number         : 0
        Product Number           : SPA-4FE-7304
        Product Version Id       : V01
        Top Assy. Part Number    : 68-2181-01
        73/68 Level Revision     : A0
        CLEI Code                : CNS9420AAA
        Base MAC Address         : 0000.0000.0000
        MAC Address block size   : 1024
        Manufacturing Test Data  : 00 00 00 00 00 00 00 00
        Field Diagnostics Data   : 00 00 00 00 00 00 00 00
        Field Diagnostics Data   : 00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00
        Calibration Data         : Minimum: 0 dBmV, Maximum: 0 dBmV
              Calibration values :
        Power Consumption        : 160000mW max
                          Mode 1 : 0mW
                          Mode 2 : 0mW
                          Mode 3 : 0mW
        EEPROM format version 4
        EEPROM contents (hex):
          0x00: 04 FF 40 04 35 41 01 00 46 01 90 C1 8B 4A 41 42
          0x10: 30 37 33 32 30 34 47 35 82 49 22 0D 03 8A 30 31
          0x20: 20 20 02 02 03 00 81 00 00 00 00 04 00 88 00 00
          0x30: 00 00 CB 94 53 50 41 2D 34 46 45 2D 37 33 30 34
          0x40: 20 20 20 20 20 20 20 20 89 56 30 31 20 87 44 08
          0x50: 85 01 8A 41 30 20 20 C6 8A 43 4E 53 39 34 32 30
          0x60: 41 41 41 CF 06 00 00 00 00 00 00 43 04 00 C4 08
          0x70: 00 00 00 00 00 00 00 00 C5 08 00 00 00 00 00 00
          0x80: 00 00 F4 00 64 00 00 00 00 00 00 00 00 00 00 00
          0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0xA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0xC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0xD0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0xE0: 00 00 00 00 00 00 00 00 00 C8 09 00 00 00 00 00
          0xF0: 00 00 00 00 D7 08 3E 80 00 00 00 00 00 00 F3 00
          0x100: 41 01 08 F6 48 43 34 F6 49 44 35 02 31 04 B0 B4
          0x110: A0 8C 00 00 05 DC 64 46 32 00 00 07 08 64 46 32
          0x120: 00 00 09 C4 64 46 32 00 00 0C E4 64 46 32 00 00
          0x130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FE 02
          0x140: F2 A6 FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x150: CC A0 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x170: 00 00 D4 A0 00 00 00 00 00 00 00 00 00 00 00 00
          0x180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x1A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x1B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x1C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x1D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x1E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x1F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
        FPGA version:
          Software version : 04.17
          Hardware version : 04.17
The following is sample output from the show diag subslot command for a 2-Port 10/100/1000 Gigabit Ethernet SPA located in the top subslot (0) of the MSC that is installed in slot 4 on a Cisco 7304 router:
Router# show diag subslot 4/0
Subslot 4/0:
        Shared port adapter: SPA-2GE-7304, 2 ports
        Info: hw-ver=0x17, sw-ver=0x0 fpga-ver=0x0
        State: ok
        Insertion time: 00:08:47 ago
        Bandwidth: 2000000 kbps
        EEPROM contents:
        Hardware Revision        : 0.23
        Boot Time out            : 0190
        PCB Serial Number        : JAB073406YH
        Part Number              : 73-8792-02
        73/68 Level Revision     : 01
        Fab Version              : 02
        RMA Test History         : 00
        RMA Number               : 0-0-0-0
        RMA History              : 00
        Deviation Number         : 0
        Product Number           : SPA-2GE-7304
        Product Version Id       : V01
        Top Assy. Part Number    : 68-2181-01
        73/68 Level Revision     : A0
        CLEI Code                : CNS9420AAA
        Base MAC Address         : 0000.0000.0000
        MAC Address block size   : 1024
        Manufacturing Test Data  : 00 00 00 00 00 00 00 00
        Field Diagnostics Data   : 00 00 00 00 00 00 00 00
        Field Diagnostics Data   : 00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00 00 00 00 00
                                   00 00 00 00
        Calibration Data         : Minimum: 0 dBmV, Maximum: 0 dBmV
              Calibration values :
        Power Consumption        : 160000mW max
                          Mode 1 : 0mW
                          Mode 2 : 0mW
                          Mode 3 : 0mW
        EEPROM format version 4
        EEPROM contents (hex):
          0x00: 04 FF 40 04 36 41 00 17 46 01 90 C1 8B 4A 41 42
          0x10: 30 37 33 34 30 36 59 48 82 49 22 58 02 8A 30 31
          0x20: 20 20 02 02 03 00 81 00 00 00 00 04 00 88 00 00
          0x30: 00 00 CB 94 53 50 41 2D 32 47 45 2D 37 33 30 34
          0x40: 20 20 20 20 20 20 20 20 89 56 30 31 20 87 44 08
          0x50: 85 01 8A 41 30 20 20 C6 8A 43 4E 53 39 34 32 30
          0x60: 41 41 41 CF 06 00 00 00 00 00 00 43 04 00 C4 08
          0x70: 00 00 00 00 00 00 00 00 C5 08 00 00 00 00 00 00
          0x80: 00 00 F4 00 64 00 00 00 00 00 00 00 00 00 00 00
          0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0xA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0xC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0xD0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0xE0: 00 00 00 00 00 00 00 00 00 C8 09 00 00 00 00 00
          0xF0: 00 00 00 00 D7 08 3E 80 00 00 00 00 00 00 F3 00
          0x100: 41 01 08 F6 48 43 34 F6 49 44 35 02 31 03 E8 B4
          0x110: A0 8C 37 26 05 DC 64 46 32 37 26 07 08 64 46 32
          0x120: 37 26 09 C4 64 46 32 32 DD 0C E4 64 46 32 43 24
          0x130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FE 02
          0x140: EF E2 FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x150: CC A0 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x170: 00 00 D4 A0 00 00 00 00 00 00 00 00 00 00 00 00
          0x180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x1A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x1B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x1C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x1D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x1E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
          0x1F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
        FPGA version:
          Software version : 04.17
          Hardware version : 04.17
Shared Port Adapter on a Cisco 12000 Series Router: Example

The following is sample output from the show diag subslot command for the 1-Port OC-192c/STM-64c POS/RPR XFP SPA in subslot 1 of the SIP located in chassis slot 1 on a Cisco 12000 series router:
Router# show diag subslot 1/1
SUBSLOT  1/1 (SPA-OC192POS-XFP): 1-port OC192/STM64 POS/RPR XFP Optics Shared Port Adapter
       Product Identifier (PID) : SPA-OC192POS-XFP   
       Version Identifier (VID) : V01
       PCB Serial Number        : PRTA1304061
       Top Assy. Part Number    : 68-2190-01
       Top Assy. Revision       : A0        
       Hardware Revision        : 2.0
       CLEI Code                : UNASSIGNED
       Insertion Time           : 00:00:10 (13:14:17 ago)
       Operational Status       : ok
Table 3 describes the significant fields shown in the display.

Table 3 show diag subslot Field Descriptions

Field

Description

Product Identifier (PID)

Product number of the SPA.

Version Identifier (VID)

Version number of the SPA.

PCB Serial Number

Serial number of the printed circuit board.

Top Assy. Part Number

Part number of the SPA.

Top Assy. Revision

Revision number (signifying a minor revision) of the SPA.

Hardware Revision

Revision number (signifying a minor revision) of the SPA hardware.

CLEI Code

Common Language Equipment Identification number.

Insertion Time

Time when the SPA was installed, and elapsed time between that insertion time and the current time.

Operational Status

Current status of the SPA. For more information about the status field descriptions, refer to the show hw-module subslot oir command.

The following is sample output from the show diag subslot details command for the 1-Port OC-192c/STM-64c POS/RPR XFP SPA in subslot 1 of the SIP located in chassis slot 1 on a Cisco 12000 series router:
Router# show diag subslot 1/1 details
SUBSLOT  1/1 (SPA-OC192POS-XFP): 1-port OC192/STM64 POS/RPR XFP Optics Shared Port Adapter
       EEPROM version           : 4
       Compatible Type          : 0xFF
       Controller Type          : 1100
       Hardware Revision        : 2.0
       Boot Timeout             : 400 msecs
       PCB Serial Number        : PRTA1304061
       PCB Part Number          : 73-8546-01
       PCB Revision             : A0        Fab Version              : 01
       RMA Test History         : 00
       RMA Number               : 0-0-0-0
       RMA History              : 00
       Deviation Number         : 0
       Product Identifier (PID) : SPA-OC192POS-XFP   
       Version Identifier (VID) : V01
       Top Assy. Part Number    : 68-2190-01
       Top Assy. Revision       : A0        IDPROM Format Revision   : 36
       System Clock Frequency   : 00 00 00 00 00 00 00 00
                                  00 00 00 00 00 00 00 00
                                  00 00 00 00 00 00
       CLEI Code                : UNASSIGNED
       Base MAC Address         : 00 00 00 00 00 00
       MAC Address block size   : 0
       Manufacturing Test Data  : 00 00 00 00 00 00 00 00
       Field Diagnostics Data   : 00 00 00 00 00 00 00 00
       Calibration Data         : Minimum: 0 dBmV, Maximum: 0 dBmV
             Calibration values :
       Power Consumption        : 11000 mWatts (Maximum)
       Environment Monitor Data : 03 30 04 B0 46 32 07 08
                                  46 32 09 C4 46 32 0C E4
                                  46 32 13 88 46 32 07 08
                                  46 32 EB B0 50 3C 00 00
                                  00 00 00 00 00 00 00 00
                                  00 00 00 00 00 00 00 00
                                  00 00 FE 02 F6 AC
       Processor Label          : 00 00 00 00 00 00 00
       Platform features        : 00 00 00 00 00 00 00 00
                                  00 00 00 00 00 00 00 00
                                  00 00 00 00 00 00 00 00
                                  00 00 00 00 00 00 00
       Asset ID                 :
       Asset Alias              :
       Insertion Time           : 00:00:10 (13:14:24 ago)
       Operational Status       : ok
SPA Interface Processor on a Cisco 12000 Series Router: Example

The following is sample output from the show diag command for a SIP located in chassis slot 2 on a Cisco 12000 series router:
Router# show diag 2 
SLOT 2  (RP/LC 2 ): Modular 10G SPA Interface Card
  MAIN: type 149,  800-26270-01 rev 84
        Deviation: 0
        HW config: 0x00    SW key: 00-00-00
  PCA:  73-9607-01 rev 91 ver 1
        Design Release 1.0  S/N SAD08460678
  MBUS: Embedded Agent
        Test hist: 0x00    RMA#: 00-00-00    RMA hist: 0x00
  DIAG: Test count: 0x00000000    Test results: 0x00000000
  FRU:  Linecard/Module: 12000-SIP-650
  FRU:  Linecard/Module: 12000-SIP-650
        Processor Memory: MEM-LC5-1024=(Non-Replaceable)
        Packet Memory: MEM-LC5-PKT-256=(Non-Replaceable)
  L3 Engine: 5 - ISE OC192 (10 Gbps)
  MBUS Agent Software version 1.114 (RAM) (ROM version is 3.4)
  ROM Monitor version 255.255
  Fabric Downloader version used 3.7 (ROM version is 255.255)
  Primary clock is CSC 1
  Board is analyzed 
  Board State is Line Card Enabled (IOS  RUN )
  Insertion time: 1d00h (2d08h ago)
  Processor Memory size: 1073741824 bytes
  TX Packet Memory size: 268435456 bytes, Packet Memory pagesize: 32768 bytes
  RX Packet Memory size: 268435456 bytes, Packet Memory pagesize: 32768 bytes
  0 crashes since restart
  SPA Information:
        subslot 2/0: SPA-OC192POS-XFP (0x44C), status is ok
        subslot 2/1: Empty
        subslot 2/2: Empty
        subslot 2/3: Empty
ADSL HWICs: Example

The following is sample output from the show diag command for a Cisco 2811 router with HWIC-1ADSL installed in slot 1 and HWIC-1ADSLI installed in slot 2. Each HWIC has a daughtercard as part of its assembly. The command results below give the output from the HWIC followed by the output from its daughtercard.

Router# show diag 0

Slot 0:
C2811 Motherboard with 2FE and integrated VPN Port adapter, 2 ports
        Port adapter is analyzed 
        Port adapter insertion time unknown
        Onboard VPN             : v2.2.0
        EEPROM contents at hardware discovery:
        PCB Serial Number        : FOC09052HHA
        Hardware Revision        : 2.0
        Top Assy. Part Number    : 800-21849-02
        Board Revision           : B0
        Deviation Number         : 0
        Fab Version              : 06
        RMA Test History         : 00
        RMA Number               : 0-0-0-0
        RMA History              : 00
        Processor type           : 87 
        Hardware date code       : 20050205
        Chassis Serial Number    : FTX0908A0B0
        Chassis MAC Address      : 0013.1ac2.2848
        MAC Address block size   : 24
        CLEI Code                : CNMJ7N0BRA
        Product (FRU) Number     : CISCO2811      
        Part Number              : 73-7214-09
        Version Identifier       :   NA 
        EEPROM format version 4
        EEPROM contents (hex):
          0x00: 04 FF C1 8B 46 4F 43 30 39 30 35 32 48 48 41 40
          0x10: 03 E7 41 02 00 C0 46 03 20 00 55 59 02 42 42 30
          0x20: 88 00 00 00 00 02 06 03 00 81 00 00 00 00 04 00
          0x30: 09 87 83 01 31 F1 1D C2 8B 46 54 58 30 39 30 38
          0x40: 41 30 42 30 C3 06 00 13 1A C2 28 48 43 00 18 C6
          0x50: 8A 43 4E 4D 4A 37 4E 30 42 52 41 CB 8F 43 49 53
          0x60: 43 4F 32 38 31 31 20 20 20 20 20 20 82 49 1C 2E
          0x70: 09 89 20 20 4E 41 D9 02 40 C1 FF FF FF FF FF FF
WIC Slot 1:
        ADSL over POTS
        Hardware Revision        : 7.0
        Top Assy. Part Number    : 800-26247-01
        Board Revision           : 01 
        Deviation Number         : 0
        Fab Version              : 07
        PCB Serial Number        : FHH093600D4
        RMA Test History         : 00
        RMA Number               : 0-0-0-0
        RMA History              : 00
        Product (FRU) Number     : HWIC-1ADSL          
        Version Identifier       : V01 
        CLEI Code                : 
        EEPROM format version 4
        EEPROM contents (hex):
          0x00: 04 FF 40 04 C8 41 07 00 C0 46 03 20 00 66 87 01
          0x10: 42 30 31 88 00 00 00 00 02 07 C1 8B 46 48 48 30
          0x20: 39 33 36 30 30 44 34 03 00 81 00 00 00 00 04 00
          0x30: CB 94 48 57 49 43 2D 31 41 44 53 4C 20 20 20 20
          0x40: 20 20 20 20 20 20 89 56 30 31 20 D9 02 40 C1 C6
          0x50: 8A FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x60: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x70: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
        EM Slot 0:
        ADSL over POTS non-removable daughtercard
        Hardware Revision        : 5.0 
        Part Number              : 73-9307-05
        Board Revision           : 03
        Deviation Number         : 0
        Fab Version              : 05
        PCB Serial Number        : FHH0936006E
        RMA Test History         : 00
        RMA Number               : 0-0-0-0
        RMA History              : 00
        Fab Part Number          : 28-6607-05
        Manufacturing Test Data  : 00 00 00 00 00 00 00 00 
        Field Diagnostics Data   : 00 00 00 00 00 00 00 00 
        Connector Type           : 01
        Version Identifier       : V01 
        Product (FRU) Number     :  
        EEPROM format version 4
        EEPROM contents (hex):
          0x00: 04 FF 40 04 7A 41 05 00 82 49 24 5B 05 42 30 33
          0x10: 88 00 00 00 00 02 05 C1 8B 46 48 48 30 39 33 36
          0x20: 30 30 36 45 03 00 81 00 00 00 00 04 00 85 1C 19
          0x30: CF 05 C4 08 00 00 00 00 00 00 00 00 C5 08 00 00
          0x40: 00 00 00 00 00 00 05 01 89 56 30 31 20 FF FF FF
          0x50: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x60: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 
          0x70: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
WIC Slot 2:
        ADSL over ISDN
        Hardware Revision        : 7.0
        Top Assy. Part Number    : 800-26248-01
        Board Revision           : 01
        Deviation Number         : 0
        Fab Version              : 07
        PCB Serial Number        : FHH093600DA
        RMA Test History         : 00
        RMA Number               : 0-0-0-0
        RMA History              : 00
        Product (FRU) Number     : HWIC-1ADSLI         
        Version Identifier       : V01 
        CLEI Code                : 
        EEPROM format version 4
        EEPROM contents (hex):
          0x00: 04 FF 40 04 C9 41 07 00 C0 46 03 20 00 66 88 01
          0x10: 42 30 31 88 00 00 00 00 02 07 C1 8B 46 48 48 30
          0x20: 39 33 36 30 30 44 41 03 00 81 00 00 00 00 04 00
          0x30: CB 94 48 57 49 43 2D 31 41 44 53 4C 49 20 20 20
          0x40: 20 20 20 20 20 20 89 56 30 31 20 D9 02 40 C1 C6 
          0x50: 8A FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x60: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x70: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
        EM Slot 0:
        ADSL over ISDN non-removable daughtercard
        Hardware Revision        : 5.0
        Part Number              : 73-9308-05
        Board Revision           : 03
        Deviation Number         : 0
        Fab Version              : 05
        PCB Serial Number        : FHH0936008M
        RMA Test History         : 00
        RMA Number               : 0-0-0-0
        RMA History              : 00
        Fab Part Number          : 28-6607-05
        Manufacturing Test Data  : 00 00 00 00 00 00 00 00 
        Field Diagnostics Data   : 00 00 00 00 00 00 00 00 
        Connector Type           : 01
        Version Identifier       : V01 
        Product (FRU) Number     :  
        EEPROM format version 4
        EEPROM contents (hex): 
          0x00: 04 FF 40 04 7B 41 05 00 82 49 24 5C 05 42 30 33
          0x10: 88 00 00 00 00 02 05 C1 8B 46 48 48 30 39 33 36
          0x20: 30 30 38 4D 03 00 81 00 00 00 00 04 00 85 1C 19
          0x30: CF 05 C4 08 00 00 00 00 00 00 00 00 C5 08 00 00
          0x40: 00 00 00 00 00 00 05 01 89 56 30 31 20 FF FF FF
          0x50: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x60: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
          0x70: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
Related Commands

Command

Description

dsl operating-mode (ADSL)

Modifies the operating mode of the digital subscriber line for an ATM interface.

show c7300

Displays the types of hardware (processors, line cards, jacket cards, and so on) installed in the Cisco 7304 router slots, including the bundled, Flash, and current FPGA versions.

show c7300 errorlog

Displays error information on a Cisco 7304 router.

show dsl interface atm

Shows all of the ADSL-specific information for a specified ATM interface.

show controllers fastethernet

Displays Fast Ethernet interface information, transmission statistics and errors, and applicable MAC destination address and VLAN filtering tables.

show controllers gigabitethernet

Displays Gigabit Ethernet interface information, transmission statistics and errors, and applicable MAC destination address and VLAN filtering tables.

show upgrade fpga progress

To display the progress of an FPGA upgrade on a Cisco 7304 router, use the show upgrade fpga progress command in privileged EXEC mode.

show upgrade fpga progress
Syntax Description

This command has no arguments or keywords.

Defaults

No default behavior or values

Command Modes

Privileged EXEC

Command History

Release

Modification

12.2(20)S6

This command was introduced.

Usage Guidelines

This command will only provide useful output during an FPGA upgrade.

This command provides information regarding FPGA upgrades, including the approximate amount of time a particular FPGA upgrade would take and the amount of time the in-progress FPGA upgrade has taken. Note, however, that the estimated FPGA upgrade times are based on routers that are not in live networks. In cases where the FPGA upgrades are performed on active routers in live networks, the upgrades can take substantially longer than the listed FPGA upgrade times. For this and other reasons, Cisco Systems suggests upgrading FPGA during maintenance windows.

Because the console where you began the FPGA upgrade becomes unusable during the FPGA upgrade, this command can only be entered from a connection that was not used to initiate the FPGA upgrade.

Examples

The following example displays information about an in-progress FPGA update. Note that the example shows the FPGA mismatch and provides the user with the approximate time needed to complete the upgrade and the amount of time the current upgrade has taken.
Router# show upgrade fpga progress
FPGA image update progress information:
  Slot 0, FPGA name = NPEG100
  Hardware version = 01.00
  Current FPGA version = 02.04
  New FPGA version = 02.05
  Time needed to update = 00:12:00 (approximate)
  Actual time taken so far = 00:01:47
Related Commands

Command

Description

show c7300

Displays the types of hardware installed in a Cisco 7304 router, including the current FPGA version and the bundled FPGA version.

show diag

Displays hardware information for any slot or the chassis.

upgrade fpga

Specifies router response when an FPGA mismatch is detected.

upgrade fpga all

Manually upgrades all of the FPGAs for all of the installed hardware on the Cisco 7304 router.

upgrade fpga

To set router behavior regarding handling of FPGA mismatches after FPGA mismatches are detected, use the upgrade fpga privileged EXEC command.

upgrade fpga [force | prompt]
no upgrade fpga
Syntax Description

force

If the force option is entered, an FPGA upgrade will be forced on the system if an FPGA mismatch is detected.

prompt

If the prompt option is entered, the user will be prompted to upgrade the FPGA when an FPGA mismatch is detected.

Defaults

Before Cisco IOS Release 12.2(20)S6, users were automatically prompted for an FPGA upgrade when an FPGA version mismatch was detected.

In Cisco IOS Release 12.2(20)S6, the default setting became no upgrade fpga. By default, FPGA is not upgraded when an FPGA version mismatch is detected and the user is not prompted to upgrade the FPGA, although it is important to note that a message indicating the FPGA mismatch is displayed on the console. Users who want to upgrade FPGA must use the upgrade fpga all command to manually perform the upgrade when the default settings are set.

Command Modes

Privileged EXEC

Command History

Release

Modification

12.2(20)S4

The upgrade fpga prompt command was introduced

12.2(20)S6

The no upgrade fpga command was introduced and became the default setting.

The force option was introduced.

The no upgrade fpga prompt command behavior was changed. The no upgrade fpga prompt configuration no longer automatically begins an FPGA upgrade when an FPGA mismatch is detected.

Usage Guidelines

When using this command, keep in mind that Cisco System recommends upgrading FPGA during maintenance windows and not when routers are active in live networks.

Note that no upgrade fpga is the default setting starting in Cisco IOS Release 12.2(20)S6. See the Defaults section of this command reference for additional information on the changes to the default setting in Cisco IOS Release 12.2(20)S6.

This command can be used to upgrade all of the FPGAs in a Cisco 7304 router except for the SPA FPGA. The SPA FPGA is upgraded using an FPD image package.

An FPGA match check is automatically run by the Cisco 7304 router during system bootup or after a piece of hardware with FPGA is installed into an operating Cisco 7304 router. This command defines the behavior for a router after an FPGA mismatch is detected during one of these FPGA match checks. When the default setting of no upgrade fpga is maintained, FPGA is not upgraded when an FPGA mismatch is detected and the user is not prompted regarding an FPGA upgrade. If the upgrade fpga prompt command is entered, a prompt asking users whether they would like to perform an FPGA upgrade appears on the console when FPGA mismatches are detected. If the upgrade fpga force command is entered, an FPGA upgrade occurs automatically when an FPGA mismatch is detected.

In Cisco IOS Releases 12.2(20)S4 and 12.2(20)S5, the no upgrade fpga prompt configuration automatically started an FPGA upgrade when an FPGA mismatch was detected. Starting in Cisco IOS Release 12.2(20)S6, the no upgrade fpga prompt configuration is the same configuration as no upgrade fpga. When this setting of no upgrade fpga is maintained, the FPGA is not upgraded when an FPGA mismatch is detected and the user is not prompted regarding an FPGA upgrade.

While the no upgrade fpga command can be entered as a configuration command, the upgrade fpga command cannot be entered unless the force or prompt options are also entered.

The force or prompt options are not necessary when entering the no upgrade fpga command. The options can be entered, but the system configuration will revert to the no upgrade fpga configuration regardless of whether a keyword is entered.

Note that when the FPGA prompt is configured, the prompt appears on the console screen only. If you are connecting to a router using a telnet connection through a line card, SPA, or port adapter, you will not see this prompt. If you are connecting to the router through one of these methods, we recommend not configuring upgrade fpga prompt because you will not be able to see the prompt and the prompt will time out.

Examples

In the following example, the system configuration has been changed so that users will be prompted regarding an FPGA upgrade if an FPGA mismatch is detected during bootup or after an OIR hardware insertion.
Router(config)# upgrade fpga prompt
The following example is the output of a router that has detected an FPGA mismatch when the upgrade fpga prompt command is configured. Note the "Upgrade slot 5 LC FPGA? [y/n]" prompt. In this example, the prompt is answered and the FPGA upgrade is performed.
The following board(s) have an FPGA image that is different
from the IOS bundled FPGA image
Please note the board(s) will be reset after FPGA update.
In the case of NSE, it will reload the whole system.
                          HARDWARE        FPGA VERSION ESTIMATED TIME
SLOT  FPGA                VERSION    CURRENT    IOS BUNDLED    TO UPDATE
----  ----                --------   -------    ----------- --------------
 5    6T3                  03.03      00.20        00.21       up to 12 minutes
Upgrade slot 5 LC FPGA? [y/n]y
Slot 5 LC FPGA update in process
PLEASE DO NOT INTERRUPT DURING FPGA UPDATE PROCESS
OR NEXT RELOAD MAY CRASH THE SYSTEM
FPGA flash update in progress
Erasing (this may take a while)...
Programming...
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
Verifying FPGA flash
  Reading from FPGA 
flash...vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
vvvDone
  Comparing with the source file...Passed
Slot 5 LC FPGA successfully updated from version 00.20 to version 00.21
Slot 5 linecard reset after FPGA update...
Slot 5 linecard successfully reset
In the following example, the system configuration has been changed so that an FPGA upgrade will occur automatically if an FPGA mismatch is detected during bootup or after an OIR hardware insertion:

Router(config)# upgrade fpga force

The following example is from a router that has detected an FPGA mismatch when upgrade fpga force is configured. Note that the upgrade occurs automatically without the user being prompted for any information.
The following board(s) have an FPGA image that is different
from the IOS bundled FPGA image
Please note the board(s) will be reset after FPGA update.
In the case of NSE, it will reload the whole system.
                          HARDWARE        FPGA VERSION ESTIMATED TIME
SLOT  FPGA                VERSION    CURRENT    IOS BUNDLED    TO UPDATE
----  ----                --------   -------    ----------- --------------
 5    6T3                  03.03      00.20        00.21       up to 12 minutes
Slot 5 LC FPGA update in process
PLEASE DO NOT INTERRUPT DURING FPGA UPDATE PROCESS
OR NEXT RELOAD MAY CRASH THE SYSTEM
FPGA flash update in progress
Erasing (this may take a while)...
Programming...
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
Verifying FPGA flash
  Reading from FPGA 
flash...vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
vvvDone
  Comparing with the source file...Passed
Slot 5 LC FPGA successfully updated from version 00.20 to version 00.21
Slot 5 linecard reset after FPGA update...
Slot 5 linecard successfully reset
In the following example, the default configuration where no prompt and no forced upgrade occurs when an FPGA mismatch occurs is restored.

Router(config)# no upgrade fpga

The following example is from a router that has detected an FPGA mismatch when no upgrade fpga is configured. Note that the FPGA upgrade was not performed. If you receive these messages and want to upgrade FPGA, enter the upgrade fpga all command to manually perform an FPGA upgrade.
00:00:05:%PLATFORM-4-FPGA_MISMATCH:FPGA image in slot 0 (name = NPEG100, hardware version 
= 01.00, current fpga version = 02.04) does not match the FPGA image in Cisco IOS software 
(version 02.05). Approximate time to update the FPGA image is 12 minutes.
00:00:08:%PLATFORM-4-FPGA_MISMATCH:FPGA image in slot 5 (name = 6T3, hardware version = 
03.03, current fpga version = 00.20) does not match the FPGA image in Cisco IOS software 
(version 00.21). Approximate time to update the FPGA image is 12 minutes.
Related Commands

Command

Description

show c7300

Displays the types of hardware installed in a Cisco 7304 router, including the current FPGA version and the bundled FPGA version.

show diag

Displays hardware information for any slot or the chassis.

show upgrade fpga progress

Displays the progress of an FPGA upgrade.

upgrade fpga all

Manually upgrades all of the FPGAs for all of the installed hardware on the Cisco 7304 router.

upgrade fpga all

To manually start the Field-Programmable Gate Array (FPGA) image update process, use the upgrade fpga all command in privileged EXEC mode.

upgrade fpga all
Syntax Description

This command has no arguments or keywords.

Defaults

No default behaviors or values

Command Modes

Privileged EXEC

Command History

Release

Modification

12.1(10)EX

This command was introduced.

12.2(11)YZ

Support was added for the 7300-CC-PA.

12.2(18)S

This command was introduced on Cisco 7304 routers running Cisco IOS Release 12.2 S.

12.2(20)S6

The prompt asking users if they would like to reload the line card to complete the FPGA upgrade process was added.

Usage Guidelines

Cisco Systems recommends performing FPGA upgrades during maintenance windows and not on active routers in live networks. There are several reasons to not perform FPGA upgrades on live routers, including traffic disruption and longer required times to upgrade FPGA.
Please keep this recommendation in mind before upgrading FPGA on your Cisco 7304 router.

Use this command to manually start the FPGA image update process. Automatic FPGA version checking is performed during every system startup for all line cards, processors, and jacket cards in the system. Automatic FPGA version checking is also performed for hardware after insertion of that hardware during an online insertion and removal (OIR).

Traffic disruption for traffic on the hardware upgrading FPGA usually occurs during FPGA upgrades. If you are going to upgrade FPGA using this command, keep this fact in mind.

Before Cisco IOS Release 12.2(20)S6, the hardware that had the FPGA upgrade would automatically be reloaded as the final procedure of the FPGA upgrade. In Cisco IOS Release 12.2(20)S6 onward, the user sees a prompt asking if the hardware should be reloaded to complete the FPGA upgrade. The user can choose to skip the hardware reload at the current time if desired, but the FPGA upgrade is not complete until the hardware is reloaded. If the user chooses not to reload the hardware that is getting the FPGA upgrade, the hardware will have to be reloaded using the hw-module slot-number stop command followed by the hw-module slot-number start command if the hardware is not a processor. If the hardware is a processor, the router must be reloaded.

In cases where the FPGA upgrade is performed but the hardware is not reloaded, users should note that the bundled FPGA version will be transferred to Flash memory but not to the hardware. Therefore, if the show c7300 command is entered to see FPGA versions after an FPGA upgrade has been performed but not completed by reloading the hardware, the bundled FPGA version should match the Flash memory version. After the hardware is reloaded, the bundled, the Flash, and the system FPGA should all match and the upgrade should be complete.

Examples

The following example shows a manual FPGA upgrade for a router using Cisco IOS Release 12.2(20)S6 or later. Note that the user elects to reject the NPE-G100 upgrade. More importantly, note the user is prompted about reloading the 6T3 line card to complete the FPGA upgrade after electing to perform that FPGA upgrade. In this example, the user decides to reject the card reload for the 6T3 line card in slot 5 and the FPGA upgrade for that card is not finalized.
Router# upgrade fpga all
The following board(s) have an FPGA image that is different
from the IOS bundled FPGA image
                          HARDWARE        FPGA VERSION ESTIMATED TIME
SLOT  FPGA                VERSION    CURRENT    IOS BUNDLED    TO UPDATE
----  ----                --------   -------    ----------- --------------
 0    NPEG100              01.00      02.04        02.05       up to 12 minutes
 5    6T3                  03.03      00.20        00.21       up to 12 minutes
Upgrade slot 0 NPEG100 FPGA? [y/n]n
%Warning:FPGA update skipped
Slot 0 NPEG100 FPGA may contain incompatible FPGA version.
This may cause system to be unstable.
00:07:54:%PLATFORM-6-FPGAUPDSKIP:Slot 0 NPEG100 FPGA update skipped.
Upgrade slot 5 LC FPGA? [y/n]y
The card in slot 5 should be reloaded for the new FPGA image to take effect.
Do you want to reload the card? [Y/N]n
Slot 5 LC FPGA update in process
PLEASE DO NOT INTERRUPT DURING FPGA UPDATE PROCESS
OR NEXT RELOAD MAY CRASH THE SYSTEM
FPGA flash update in progress
Erasing (this may take a while)...
Programming...
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
Verifying FPGA flash
  Reading from FPGA 
flash...vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
vvvDone
  Comparing with the source file...Passed
Slot 5 LC FPGA successfully updated from version 00.20 to version 00.21
00:20:27:%PLATFORM-6-FPGAUPDSUCCESS:Slot 5 LC FPGA successfully updated from version 00.20 
to 00.21.
00:20:27:%PLATFORM-4-FPGAUPD_RELOAD_SKIP:After the FPGA update, the card in slot 5 was not 
reloaded. The card should be reloaded for the new FPGA image to take effect.
The following example shows how to manually start the FPGA image update process for an NSE for a router running a pre-Cisco IOS Release 12.2(20)S6 software image:
Router# upgrade fpga all
The following board(s) may have incompatible FPGA(s) and may
need an upgrade or downgrade.
Please note the board(s) will be reset after FPGA update.
In the case of NSE, it will reload the whole system.
SLOT  FPGA                CURRENT VERSION  BUNDLED VERSION  ESTIMATED TIME TO
                           ON THE BOARD         IN IOS            UPDATE     
----  ----                ---------------  ---------------  -----------------
 0    NSE100 (MB)              00.03            00.12       up to 15 minutes
 0    NSE100 (DB)              00.03            00.10       up to 6 minutes
Upgrade slot 0 NSE MB FPGA? [y/n]y
Upgrade slot 0 NSE DB FPGA? [y/n]y
Slot 0 NSE MB FPGA update in process
PLEASE DO NOT INTERRUPT DURING FPGA UPDATE PROCESS
OR NEXT RELOAD MAY CRASH THE SYSTEM
FPGA flash update in progress
Erasing (this may take a while)...
Programming...
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
Verifying FPGA flash
  Reading from FPGA flash...vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv 
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv 
vvvvvvvvvvvvvDone
Comparing with the source file...Passed
Slot 0 NSE MB FPGA successfully updated from version 0.3 to version 0.12
Slot 0 NSE DB FPGA update in process
PLEASE DO NOT INTERRUPT DURING FPGA UPDATE PROCESS
OR NEXT RELOAD MAY CRASH THE SYSTEM
FPGA flash update in progress
Erasing (this may take a while)...
Programming...
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
Verifying FPGA flash
  Reading from FPGA flash...vvvvvvvvvvvvvvvvvvvvvvDone
  Comparing with the source file...Passed
Slot 0 NSE DB FPGA successfully updated from version 0.3 to version 0.10
System will be reloaded now for the new FPGA to take effect...
The following example shows how to manually update the FPGA image of a line card on a router running pre-Cisco IOS Release 12.2(20)S6 software:
Router# upgrade fpga all
The following board(s) may have incompatible FPGA(s) and may
need an upgrade or downgrade.
Please note the board(s) will be reset after FPGA update.
In the case of NSE, it will reload the whole system.
SLOT  FPGA                CURRENT VERSION  BUNDLED VERSION  ESTIMATED TIME TO
                           ON THE BOARD         IN IOS            UPDATE     
----  ----                ---------------  ---------------  -----------------
 4    OC48 POS                 00.13            00.12       up to 5 minutes
Downgrade slot 4 LC FPGA? [y/n]y
Slot 4 LC FPGA update in process
PLEASE DO NOT INTERRUPT DURING FPGA UPDATE PROCESS
OR NEXT RELOAD MAY CRASH THE SYSTEM
FPGA flash update in progress
Erasing (this may take a while)...
Programming...
CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC
Verifying FPGA flash
  Reading from FPGA flash...vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvDone
  Comparing with the source file...Passed
Slot 4 LC FPGA successfully updated from version 0.13 to version 0.12
Slot 4 linecard reset after FPGA update...
Slot 4 linecard successfully reset
00:11:37:%PLATFORM-6-FPGAUPDSUCCESS:Slot 4 LC FPGA successfully update from version 0.13 
to 0.12.
Related Commands

Command

Description

show c7300

Displays the types of hardware (processors, line cards, jacket cards, and so on) installed in the Cisco 7304 router slots, including the bundled, Flash, and current FPGA versions.

show diag

Displays hardware information for any slot or the chassis.

upgrade rom-monitor default

Configures a particular ROM monitor image as the default ROMmon image.

upgrade rom-monitor file

Upgrades the ROM monitor.

Hierarchical Navigation

Cisco IOS Software Releases 12.1 Special and Early Deployments

Cisco 7304 FPGA Bundling and Update

Downloads

Table Of Contents

Cisco 7304 FPGA Bundling and Update

Feature Overview

Benefits

Restrictions and Important Notes Regarding FPGA

Related Features and Technologies

Related Documents

Supported Platforms

Supported Standards, MIBs, and RFCs

Configuration Tasks

Setting Automatic FPGA Upgrades (Cisco IOS Release 12.2(20)S6 Onward)

Enabling FPGA Prompting (Cisco IOS Release 12.2(20)S6 Onward)

Setting Automatic FPGA Upgrades (Cisco IOS Release 12.2(20)S4 and 12.2(20)S5 Only)

Manually Starting the FPGA Image Update

Verifying the FPGA Version

FPGA Verification Steps (Cisco IOS Release 12.2(20)S6 Onward)

Verifying Status of an In-Progress FPGA Upgrade

FPGA Verification Steps (Prior to Cisco IOS Release 12.2(20)S6)

Troubleshooting Tips

Monitoring and Maintaining the Cisco 7304 Router

Configuration Examples

Manually Updating FPGA (Cisco IOS Release 12.2(20)S6 or later)

FPGA Image Update after a Line Card OIR Example (Prior to Cisco IOS Release 12.2(20)S6)

Forcing Automatic FPGA Updates Example

Enabling FPGA Prompting Example

Command Reference

show c7300

Syntax Description

Defaults

Command Modes

Command History

Usage Guidelines

Examples

Related Commands

show diag

Syntax Description

Defaults

Command Modes

Command History

Usage Guidelines

Examples

Related Commands

show upgrade fpga progress

Syntax Description

Defaults

Command Modes

Command History

Usage Guidelines

Examples

Related Commands

upgrade fpga

Syntax Description

Defaults

Command Modes

Command History

Usage Guidelines

Examples

Related Commands

upgrade fpga all

Syntax Description

Defaults

Command Modes

Command History

Usage Guidelines

Examples

Related Commands