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Cisco ONS 15300 Series

ONS15327 Older Revision OC12 Cards May Exhibit Bit Errors


Revised March 26, 2004

May 30, 2003


Products Affected

Product

Top Assembly

Comments

Part Number

Rev.

15327-OC12-1-IR

800-07273-01

A0

B0

C0

D0

OC12, IR, 1310nm, 1 SC Port, CTEMP (Note: Replacements are I-Temp rated.)

15327-OC12-1-IR

800-07273-02

A0

B0

C0

D0

E0

F0

OC12, IR, 1310nm, 1 SC Port, CTEMP (Note: Replacements are I-Temp rated.)

15327-OC12-1I13-T

800-20752-01

A0

B0

C0

D0

OC12, IR, 1310nm, 1 SC Port, ITEMP

15327-OC12-1L15-T

800-14697-01

A0

B0

OC12, LR, 1550nm, 1 SC Port, ITEMP

Problem Description

Some older revisions of the OC12 cards can exhibit circuit bit errors when the ONS 15327 is configured with an OC12 card in slot 4 and an active XTC is in slot 5. The root cause is the limited physical distance between slot 4 and slot 5, in conjunction with marginal timing issues with respect to the setup and hold time of the backplane clock and data between the BTC ASIC on the OC12 card and the SXC ASIC on the XTC card.

The instance is within a small number of OC12 cards (less than 10 percent) used in combination with a small number of XTC cards (also less than 10 percent) that can cause intermittent dribbling bit errors when connected in slot 4 and slot 5 configurations, respectively.

Additionally, having an OC48 card in the same system increases data bits flowing through the backplane, and thus increases the chances of electrical interference (noise) between OC48 and OC12 signals.

Note:?OC12 signals are operating at the edge of their margin and are adversely impacted by this. OC48 signals are operating at their midrange and do not have any adverse impact from the OC12 interference.

Background

During ongoing system testing, circuit bit errors had been observed. The test set showed slow bit error while the node ran for a period of time.

After root cause analysis, it was determined that the cause was limited physical distance between slot 4 and slot 5, in conjunction with marginal timing issues with respect to the setup and hold time of the backplane clock and data between the OC12 card BTC ASIC part and the XTC card SXC ASIC part.

This issue does not apply to the OC3 or OC48 cards. This issue is only isolated to the OC12 cards. Refer to the Products Affected revision.

Cisco has implemented a solution that requires a minor redesign to the OC12 card. This new design is incorporated to allow configuration of the OC12 card in slot 4, in combination with the active XTC in slot 5. It eliminates the marginal timing issues between the two cards that do not exhibit this behavior.

Problem Symptoms

With use of a specified revision OC12 card in slot 4 and an active XTC card in slot 5, intermittent bit errors are observed.

Additionally, having an OC48 card in the same system increases data bits that flow through the backplane. This increases the chances of electrical interference (noise) between OC48 and OC12 signals.

Workaround/Solution

Affected boards listed in the Products Affected list may be returned for replacement. Contact Cisco Technical Support.

Newer OC12 boards have been redesigned. This new design has been incorporated to allow configuration of the OC12 card in slot 4, in combination with the active XTC in slot 5, and eliminate the marginal timing issues between the two cards.

A temporary workaround was previously available. Configure the OC12 cards only in slots 1-3. Do not utilize an ONS 15327 OC12 card with the revisions in slot 4. (Refer to the Products Affected section for the revisions.) This temporary workaround applies to both the CTemp and ITemp cards, as the Products Affected revisions show.

For More Information

If you require further assistance, or if you have any further questions regarding this field notice, please contact the Cisco Systems Technical Assistance Center (TAC) by one of the following methods:

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