The inexorable growth of worldwide data traffic continues unabated, and the networks and data centers at the heart of the Internet are struggling to keep pace. The biggest roadblock is optical interconnect technologies. Now, a new technology is poised to revolutionize optical transport: complementary metal-oxide semiconductor (CMOS) photonics.
CMOS photonics applies CMOS fabrication processes – integrating multiple circuit components in a highly efficient design, then printing entire circuits directly on silicon wafers – to produce optical devices. As a result, optics can now be designed and manufactured using CMOS processes, and indeed, using the very same CMOS fabrication facilities and design tools used to create application-specific integrated circuits (ASICs). For the first time, optical modules can benefit from CMOS innovation and efficiency. And for the first time, Moore’s Law can be applied to optical, as well as electrical, functionality.
Cisco® technology stands at the forefront of this revolution. With the industry’s first portfolio of IEEE-standard-compliant pluggable transceiver modules incorporating CMOS photonics, Cisco is unveiling a new generation of 100-Gbps optical solutions that are smaller, faster, and more power-efficient than any available before. Drawing on 40 years and $400 billion of CMOS industry investment, Cisco CPAK™ solutions will provide the foundation to meet the capacity demands of the next generation of optical networking and transport.
Cisco is building CPAK to provide a full product portfolio, allowing service providers to employ CMOS photonics advances in a variety of client-side applications, from transport to routing to switching. Together, these solutions will deliver the smallest form-factor, most efficient 100-Gbps optical transceiver portfolio in the industry. Cisco CPAK will be available in several IEEE-standard optical interfaces. Cisco CPAK 100GBASE-SR10 and CPAK 100GBASE-LR4 will be the first modules available (see Figure 1).
Figure 1. Cisco CPAK 100GBASE-LR4
The first product that Cisco is introducing that incorporates CPAK is the Cisco 100-Gbps DWDM Coherent Transponder Line Card. Due to its small size, CPAK can be integrated into the line card, eliminating a separate C Form-Factor Pluggable (CFP) client interface card. This effectively takes a two-chassis-slot solution down to a single chassis slot while providing the full range of client-side interfaces. This line card increases the potential bandwidth of service providers’ existing Cisco optical chassis, while reducing the power consumption of each coherent dense wavelength-division multiplexing (DWDM) channel.
Catching Up with Global Demand
New communication, video, and mobile applications are changing the way we use the Internet, and creating a need for unprecedented speed and capacity. Consider:
● The Cisco Visual Networking Index™ (Cisco VNI™) forecasts that mobile data traffic will grow at a compound annual growth rate (CAGR) of 92 percent between 2010 and 2015.
● As of January 2012, one hour of video was uploaded to YouTube every second. Cisco VNI projects that video will quadruple all other IP traffic by 2014.
● Overall, Cisco VNI projects global IP traffic to reach 110 exabytes per month by 2016 – equivalent to about 27 billion DVDs, 26 trillion MP3 players, or 780 quadrillion text messages, an immense amount of traffic.
● By 2016, there will be 3.4 billion Internet users and 50 billion connected devices.
● The cloud will account for nearly two thirds of data center traffic, and cloud-based workloads will be quadruple those of traditional servers.
To accommodate this exponential growth, data centers are becoming larger and larger. New data centers from Google, Apple, and Amazon measure in hundreds of thousands of square feet, and the planned IBM and Range Technology data center – the world’s largest – will occupy 6 million square feet. The transition to virtualized data centers is also propelling growth in the amount of East-West (data center to data center) traffic in the data center, increasing the number of interconnects within these flatter architectures.
These trends are causing service providers to deploy enormous amounts of equipment, and presenting an unprecedented power consumption challenge that needs to be addressed. In 2007, the United States Environmental Protection Agency estimated that, by 2011, U.S. data centers would consume as much as 2 percent of the total power generated in the country. Much of this consumption is used to cool the equipment.
However, while the ASICs used in data center routers, switches, and servers are rising to this challenge by becoming smaller, faster, and more power-efficient every year, the same cannot be said for optical interconnects. Pluggable transceiver modules give service providers the flexibility they need to support high-speed connections between equipment in the same rack or across town. But the large physical size and excessive power consumption of today’s solutions are limiting the port density – and as a result, the bandwidth – that this equipment can provide. In many cases, these solutions are literally limited by the number of modules that can fit on a line-card faceplate. Ultimately, conventional optical transceivers, and the traditional fabrication processes on which they rely, are simply not capable of meeting the global traffic demands of the coming years.
Service providers and data center operators need new optical solutions that:
● Reduce capital expenditures (CapEx) by providing a higher level of integration and scalability, and delivering more features and capacity with a smaller footprint
● Reduce operational expenses (OpEx) by dissipating much less power, running cooler, and taking advantage of newer, more flexible architectures
Key to achieving these goals, the next generation of high-capacity optical modules must increase the faceplate bandwidth of optical networking equipment. As speeds become ever higher, optical solutions will also need to provide greater bandwidth density of the backplane and chip-to-chip interconnects beyond the capabilities of current technologies.
Cisco CPAK optical solutions using revolutionary CMOS photonics technology can address all of these demands.
Cisco CPAK: Harnessing CMOS Photonics
The height of the dot-com boom saw major advances in both photonic and electrical transmission technologies. But since 2001, while ASICs have advanced by leaps and bounds in accordance with Moore’s Law, optical advances have come much more slowly. Today, even as optical interfaces reach 100 Gbps, the sheer physical size of the modules, as well as the excessive heat and power they dissipate, are limiting the ability to scale networking and data center equipment to meet global demand.
Why the difference between electrical and optical technology? ASICs have benefited hugely from CMOS fabrication processes. As semiconductor design has evolved, CMOS processes have enabled ever smaller, more powerful, and more efficient ASICs.
The CMOS industry benefits from the virtuous circle of the semiconductor industry. Demand for higher-performance, lower-cost products promotes innovation. New innovations are then rapidly scaled due to the inherent nature of wafer-scale processing. This process in turn lowers costs and increases volume in the consumer market, which allows for investment and further innovation. This cycle has driven the semiconductor industry and was the trend that Gordon Moore recognized in 1965 when he coined Moore’s Law (see Figure 2).
Figure 2. This cycle of innovation is the power behind Moore’s Law, and the engine behind CMOS Photonics
Today, CMOS encompasses a suite of mature design tools and repeatable manufacturing processes that promote ever-greater performance and efficiency. Indeed, CMOS fabrication is now a multi-hundred-billion-dollar global industry, and almost every computing and electronic product benefits from the relentless drive to produce smaller, faster, cheaper CMOS chips.
At the same time, however, optical technologies have progressed much more slowly. In today’s optical solutions, most of the photonic elements (modulators, switches, photodectectors, etc.) are independently manufactured and assembled, with each individually optimized for its specific function. As a result, optical solutions remain effectively hybrid solutions – expensive, time-consuming to manufacture, and typically inefficient in the power they consume and dissipate.
CMOS photonics changes the game by integrating photonic elements within the CMOS manufacturing process, and allowing silicon manufacturers to print them directly onto a small CMOS die in the same way they fabricate ASICs. Because these solutions perform all the optical manipulation and control using CMOS-level signaling to drive and control optical elements, they allow for extremely efficient, low-power optical circuits.
Cisco is taking the lead in making CMOS-photonics pluggable transceivers a viable optical solution for optical networks and data centers. Recognizing that the development of optical technologies was not moving fast enough to meet global demand, Cisco has stepped in to fill this void and invested in making the optical CMOS revolution a reality. With a new portfolio of CPAK optical solutions, Cisco is listening to customers and investing in solutions for the long term. With the advent of CMOS photonics in standards-based, pluggable optical solutions, optical transport can now benefit from the unprecedented innovation, infrastructure, and scalability of the semiconductor industry. Moore’s Law can finally be applied to optics, and service providers can be confident that optical solutions will be able to meet the global IP traffic demands of the future.
How CMOS Photonics Works
CMOS photonics employs standard integrated circuit design processes to produce photonic building blocks. High-speed modulators, waveguides, optical muxponders, and other photonic signaling elements have been developed, and can be integrated and replicated directly on a silicon wafer. Using industry-standard CMOS design tools such as Cadence, Mentor Graphics, and others, designers can develop the schematic of the optical circuit, perform simulations, perform chip layout and post-layout simulations, and generate Graphic Data System (GDS) circuit layouts, just like any ASIC designs (Figure 3).
Then, using the standard CMOS fabrication processes, the optical chip design can be repeated across a wafer, which can then be replicated as needed by a silicon foundry. In this way, optical chip design can have the same repeatability, consistency, and supply-chain security that exist today for ASICs.
Figure 3. CMOS Photonic Circuit Design
Why CMOS Photonics Matter
The advantages of applying CMOS processes to optical technologies cannot be overstated. By expanding CMOS to the optical domain, today’s hugely successful CMOS manufacturers can use the very same standard CMOS processes and design tools that they use for ASICs to provide optical circuits for virtually any application. They can then integrate those designs directly into the existing wafer-scale fabrication infrastructure, which already produces millions of wafer starts per week and generates hundreds of billions in revenue per year.
As a result, optical technologies can now, for the first time, capitalize on the billions of dollars of investment in high-speed, highly efficient CMOS design, and the incessant industry drive for more integration, smaller footprint, and lower power consumption and cost. Ultimately Moore’s Law can now apply to optical innovation, and create a new generation of optical design and efficiency.
Comparing CPAK to Current-Generation Technologies
An optical line card’s capacity can be limited by the technology available at the time it was designed, affecting the technology’s power dissipation and the number of optical modules that can physically fit on the faceplate of a line card. As a result of these limitations, current-generation line cards can fall short in meeting capacity demands, even when they offer higher data rates.
● Enhanced Small Form-Factor Pluggable (SFP+) modules are limited to 48 ports at 1W each, producing 48W of transceiver dissipation to provide 480 Gbps.
● C Form-Factor Pluggable (CFP) modules provide 100-Gbps capacity, but because of the large footprint of the modules and excessive power dissipation, they cannot effectively scale. CFP is typically limited to two ports per line card at 24W each, producing 48W of transceiver dissipation to provide 200 Gbps.
CPAK, the first implementation of Cisco’s CMOS photonics technology, shatters all of these barriers. Cisco CPAK modules are less than one third the size of CFP modules, and dissipate less than one third the power (nominally less than 5.5W for CPAK 100GBASE-LR4). As a result, they can support more than ten 100-Gbps ports, allowing the optics on a Terabit-capacity line card to dissipate just 55W of transceiver power. Contrast that with today’s 10-Gbps transceivers, which generate 48W to produce 480 Gbps – less than half the capacity.
CPAK incorporates IEEE standard interfaces, allowing it to optically interface with other module form factors with IEEE-compliant interfaces. This means that service providers and data centers can achieve unprecedented capacity, scale, and efficiency, and retain the ability to interoperate in a multivendor environment
Accelerating worldwide data traffic trends present a difficult challenge, but not an insurmountable one. The key to meeting the data needs of tomorrow lies in a new generation of optical interconnect technologies. Cisco is stepping up to meet this industry requirement, and initiate new advances in photonics development and manufacturing.
The roadmap for the relentless advance of smaller, faster, and more efficient circuits already exists, in the form of CMOS design and manufacturing. By uniting optical technologies with CMOS processes and tools in a portfolio of standards-based 100-Gbps platforms, Cisco can help service providers and data center operators reduce capital and operational expenses today, and meet the data traffic demands of tomorrow.
For more information about Cisco CPAK technology, visit www.cisco.com/go/100G.